2007/9/26, Jim Wilson <[EMAIL PROTECTED]>: > ÎâêØ wrote: > > [(set_attr "itanium_class" "tnat")]) > > The itanium_class names are based on info from the Itanium Processor > Microprocessor Reference by the way. > > I believe the problem is that you didn't add info to the DFA scheduler > dscriptions in the itanium1.md and itanium2.md files for this new > instruction class. Normally the DFA scheduler info is optional. > However, for itanium, we also use the scheduler for bundling, and hence > proper DFA scheduler info for each instruction class is required. > > It appears that the tnat instruction schedules and bundles the same as > the tbit instruction, so just use the existing tbit class instead of > trying to add a new one. The docs are a bit unclear here though, since > some places mention tbit and tnat, and other places just mention tbit. > For your purposes, this isn't important. > > Modifying the DFA scheduler descriptions is complicated. It is best to > avoid that if you can. > > Specifying that tnat is an I type instruction isn't enough for bundling > purposes, since a lot of instructions have further restrictions. In > this case, for instance, tnat can only go into an I0 slot, not an I1 > slot. This detail is handled in the DFA scheduler descriptions. > -- > Jim Wilson, GNU Tools Support, http://www.specifix.com >
Truly thanks, I have discovered this problem after I sent the first mail, and I found itanium1.md and itanium2.md describe the pipeline hazard, but they are really complex... :-(. Is there any guide or docs on this? thanks However, I have adjusted tnat class to tbit, and it seems working now. Thanks again
