Uros Bizjak wrote:
Hello!
I would like to bring a strange optimization problem to the attention of
RTL expert. The problem is outlined in PR rtl-optimization/33353, the
core of the problem is that passes that follow RTL fwprop1 pass simply
don't process REG_EQUAL notes that mark constant resul
However, it looks that GCC doesn't know what to do with the constants.
The problem is that there is no
(set (reg) (const_vector))
insn. RTL passes know how to do many substitutions, but only if the
resulting RTL matches. fwprop, combine, CSE could probably do something
interesting with an insn matching such a pattern
Paolo
