Hi all ..
I'm currently porting GCC into a new processor, and I have a problem in
instruction scheduling ...
The case is like this:
In the machine description (*.md) file, sometimes I emit a single RTL
instruction into multiple ASM instruction. The problem is, in some case I
need to emit an operand that actually doesn't exist in its RTL
representation. For example :
"movpqi_insn x,y" instruction will be translated as ==> "sar x, *ar15" and
"lar y, *ar15"
Where "sar" means "Store register" and "lar" means "load register" ...
Since GCC performs instruction scheduling in RTL form, it doesn't know that
instruction "movpqi_insn" actually reads AR15 .... Hence, sometimes GCC
moves an instruction that actually SHOULD NOT be moved, due to data
dependence in AR15...., and it causes incorrect scheduling (This is my
analysis, please tell me if you guys think I'm wrong)...
So, I need to:
(1) whether disable the scheduling for that particular dependency, or
(2) Inform GCC that "movpqi_insn" has an additional dependency in AR15 ....
The problem is, I still don't know how can i do those 2 things ... So if any
of you have any advice, I'd be really grateful .... :D
Thx ..
Any info will be appreciated ...
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