Hello,

thanks for your answer.
Here is an excerpt of the .00.expand file for insn 45:

---snip---
(insn 45 47 46 1 (set (subreg:SI (reg:DI 92 [ D.1212 ]) 4)
        (reg:SI 93 [ D.1211 ])) -1 (nil)
    (expr_list:REG_NO_CONFLICT (reg:SI 93 [ D.1211 ])
        (nil)))
---snap---

That means the compiler has to reload the pseudo registers 92 and 93 for
this instruction, right?

Jim Wilson wrote:
> and lreg ones.  The greg one will have a section listing all of the
> reloads generated, find the list of reloads generated for this insn 45.

The relevant data for instruction 45 in .greg looks like that:
---snip---
;; Function main

;; Need 2 regs of class FP_REGS (for insn 15).
;; Need 2 regs of class ALL_REGS (for insn 15).
Spilling reg 32.
Spilling reg 33.
;; Register dispositions:
69 in 3  70 in 8  71 in 4  72 in 8  73 in 5  74 in 8
75 in 6  76 in 1  77 in 8  78 in 9  79 in 10  80 in 9
81 in 8  82 in 9  83 in 8  84 in 10  85 in 8  86 in 9
87 in 8  88 in 8  89 in 9  90 in 7  91 in 9  92 in 9
93 in 10  94 in 2

;; Hard regs used:  1 2 3 4 5 6 7 8 9 10 29 30 31 32 33

<SOME OTHER INSTRUCTIONS>

(insn 45 44 47 (use (reg:SI 8 r8)) -1 (nil)
    (nil))

<SOME OTHER INSTRUCTIONS>
---snap---

> lreg will have info about register class preferencing.  It will tell you
> what register class the compiler wants to use for this insn.

Same for the .lreg file:

---snip---
;; Function main

95 registers.

Register 69 used 7 times across 0 insns.

Register 70 used 2 times across 0 insns; pointer.

Register 71 used 6 times across 0 insns.

Register 72 used 2 times across 0 insns.

Register 73 used 6 times across 0 insns.

Register 74 used 2 times across 0 insns; pointer.

Register 75 used 7 times across 0 insns.

Register 76 used 2 times across 0 insns; pref FP_REGS.

Register 77 used 4 times across 0 insns.

Register 78 used 2 times across 0 insns.

Register 79 used 2 times across 0 insns.

Register 80 used 2 times across 0 insns.

Register 81 used 2 times across 0 insns.

Register 82 used 2 times across 0 insns.

Register 83 used 2 times across 0 insns.

Register 84 used 2 times across 0 insns.

Register 85 used 2 times across 0 insns; pref FP_REGS; pointer.

Register 86 used 2 times across 0 insns.

Register 87 used 2 times across 0 insns.

Register 88 used 4 times across 0 insns.

Register 89 used 2 times across 0 insns.

Register 90 used 6 times across 0 insns.

Register 91 used 2 times across 0 insns.

Register 92 used 2 times across 0 insns; pointer.

Register 93 used 2 times across 0 insns.

Register 94 used 2 times across 0 insns; crosses 1 call; pref FP_REGS.

0 basic blocks.

;; Register 69 in 3.
;; Register 70 in 8.
;; Register 71 in 4.
;; Register 72 in 8.
;; Register 73 in 5.
;; Register 74 in 8.
;; Register 75 in 6.
;; Register 76 in 1.
;; Register 77 in 8.
;; Register 78 in 9.
;; Register 79 in 10.
;; Register 80 in 9.
;; Register 81 in 8.
;; Register 82 in 9.
;; Register 83 in 8.
;; Register 84 in 10.
;; Register 85 in 8.
;; Register 86 in 9.
;; Register 87 in 8.
;; Register 88 in 8.
;; Register 89 in 9.
;; Register 90 in 7.
;; Register 91 in 9.
;; Register 92 in 9.
;; Register 93 in 10.
;; Register 94 in 2.

<SOME OTHER INSTRUCTIONS>

(insn 45 44 47 (use (reg:SI 88)) -1 (nil)
    (nil))

<SOME OTHER INSTRUCTIONS>
---snap---

> The fact that this insn doesn't do FP isn't important.  What is
> important is how the pseudo-regs are used.  If the pseudo-reg 92 is used
> in 10 insns, and 8 of them are FP insns and 2 are integer move insns,
> then the register allocator will prefer an FP reg, since that should
> give the best overall result, as only 2 insns will need reloads.  If it
> used an integer reg, then 8 insns would need reloads.

Ok that's clear. Thanks for explaining. Nevertheless I can't figure out
from the above files what's wrong and maybe I am just lacking of the
right interpretation of these intermediate files.
Can you figure out any abnormal behaviour from the above file excerpts?


Thanks in advance,

Markus Franke

Reply via email to