[EMAIL PROTECTED] wrote on 26/02/2007 10:40:59: >I am targeting GCC 4.1.1 to a custom RISC processor; which has some vector >instructions (32 bit vectors). It can perform two 16 bit/ or four 8 bit >additions, subtractions, multiplications & shift operations simultaneously.
>I would like to use the Auto-Vectorizing capability to generate these >instructions. Is there an existing backend that I could look at for >something similar? Any help will be greatly appreciated. Maybe Dorit's lecture from the last HiPEAC GCC tutorial can help you: http://www.hipeac.net/system/files?file=4_Nuzman.ppt I think slides 14-18 are most relevant for you. Good luck, Tehila. >SD
