Bernd Schmidt <[EMAIL PROTECTED]> writes:
> Rask Ingemann Lambertsen wrote:
> > The constraints are not met because the constraint "d" is register class
> > DX_REGS consisting of register 4 and 5, and (reg:HI 5 dh) spans register 5
> > and 6. Also, HARD_REGNO_NREGS (5, HImode) returns 0.
> > The lreg and greg dumps provide the clue that reload got the mode
> > wrong:
> > (insn:HI 2485 2483 2486 39 libgcc2.c:1825 (set (subreg:HI (reg:QI
> > 178) 0)
> > (ashiftrt:HI (reg:HI 641)
> > (const_int 15 [0xf]))) 31 {*ashrhi3_const15}
> > (insn_list:REG_DEP_TRUE 2480 (nil))
> > (expr_list:REG_DEAD (reg:HI 641)
> > (nil)))
>
> Probably the compiler doesn't in general like a paradoxical subreg
> that can take more hard regs than its SUBREG_REG. I think this is
> probably something that can be worked around with a proper combination
> of MODES_TIEABLE_P, CANNOT_CHANGE_MODE_CLASS, and maybe
> REG_CANNOT_CHANGE_MODE_P. What are your definitions of those macros?
This also suggests the possibility of writing a QImode version of the
insn which uses a scratch register.
Ian
