On 26 May 2006 16:23, Momchil Velikov wrote: > Now r3 is stored at [r14 + 160], which is incorrect. The reason is > that when substituting the reload register into insn 2780, the insn > 22942 is modified also, because they share the following rtx: (plus:SI > (reg/f:SI 14 r14) (const_int 124 [0x7c])). Since insn 2780 modifies > r3, r3 is no longer equal to ``r14 + 124'' at insn 22942, which > results in incorrect store. > > I'd appreciate any suggestions for fixing this.
Unsharing the rtx sounds like the right thing to do to me; the internals docs "Structure sharing assumptions" says things like "* No RTL object appears in more than one place in the RTL structure except as described above. Many passes of the compiler rely on this by assuming that they can modify RTL objects in place without unwanted side-effects on other insns." and by the time we're in reload that should definitely be the case for a complex binary operator. How did they get to be shared in the first place? That's probably the underlying cause of the bug. cheers, DaveK -- Can't think of a witty .sigline today....