FYI, here are the IRA and LRA dumps as of -da
Am 04.08.25 um 13:04 schrieb Georg-Johann Lay via Gcc:
Rewriting avr.md so it uses less explicit hard registers, I came
across the ICE below. I am using 2 patches as attached:
- A tentative fix for LRA https://gcc.gnu.org/PR121198
- A WIP to rewrite avr.md's divmodhi4 to use HRCs instead of
explicit hard regs. Outcome is that divmodhi4 will read
like this:
(define_insn_and_split "divmodhi4"
[(set (match_operand:HI 0 "register_operand" "={r22}")
(div:HI (match_operand:HI 1 "register_operand" "{r24}")
(match_operand:HI 2 "register_operand" "{r22}")))
(set (match_operand:HI 3 "register_operand" "={r24}")
(mod:HI (match_dup 1)
(match_dup 2)))
(clobber (match_scratch:HI 4 "={r26}"))
(clobber (match_scratch:QI 5 "={r21}"))]
""
"#"
"&& reload_completed"
[(scratch)]
{ DONE_ADD_CCC })
Then compile
void bar (int, char*);
void foo (int k)
{
bar (k / 5, "one");
}
$ avr-gcc spill.c -S -mmcu=avr4 -Os -da
spill.c: In function 'foo':
spill.c:6:1: error: unable to find a register to spill
6 | }
| ^
spill.c:6:1: error: this is the insn:
(insn 9 20 16 2 (parallel [
(set (reg:HI 53)
(div:HI (reg:HI 49 [ k ])
(reg:HI 54 [48])))
(set (reg:HI 55 [47])
(mod:HI (reg:HI 49 [ k ])
(reg:HI 54 [48])))
(clobber (reg:HI 56 [50]))
(clobber (reg:QI 57 [51]))
]) "spill.c":5:5 588 {divmodhi4}
(expr_list:REG_UNUSED (reg:QI 57 [51])
(expr_list:REG_UNUSED (reg:HI 56 [50])
(expr_list:REG_UNUSED (reg:HI 55 [47])
(expr_list:REG_DEAD (reg:HI 54 [48])
(expr_list:REG_DEAD (reg:HI 49 [ k ])
(nil)))))))
during RTL pass: reload
dump file: spill.c.326r.reload
spill.c:6:1: internal compiler error: in lra_split_hard_reg_for, at
lra-assigns.cc:1863
Some questions:
1) Is there anything wrong with the divmodhi4 pattern per se?
AFAIU match_dup is the right thing to do. HImode regs must start
in even registers, so that's fine too I think.
When the pattern itself is fine, I would open a PR for the ICE.
2) I had a look at the IRA dump. The assignments it comes up with
have nothing to do with the constraints:
divmodhi4 Regs before IRA
Op Reg IRA *=pseudo assigns
0 =r22:HI 24
1 r24:HI 49* 24
2 r22:HI 48* 18
3 =r24:HI 47* 18
4 =r26:HI 50* 20
5 =r21:QI 51* 30
That is: IRA comes up with assigns that have nothing to do with
the constraints of the insn. Doesn't that make it extra hard
for LRA to come up with the specified constraints?
IIUC, HRCs materialize in lra-constraints.cc, and IRA doesn't
know anything about them. Isn't that a perfect situation for
sub-optimal code? Since LRA will have to spill many of IRA's
choices, requiring a zoo off extra moves and frame locations
when reg pressure is high.
So I guess the problem is that IRA only works on the level of
register classes, and it cannot do anything about HRCs since
they don't have a register class in general?
Johann
;; Function foo (foo, funcdef_no=0, decl_uid=2020, cgraph_uid=1, symbol_order=0)
Starting decreasing number of live ranges...
starting the processing of deferred insns
ending the processing of deferred insns
df_analyze called
;; 1 loops found
;;
;; Loop 0
;; header 0, latch 1
;; depth 0, outer -1
;; nodes: 0 1 2
;; 2 succs { 1 }
Removing SCRATCH to p50 in insn #9 (nop 4)
Removing SCRATCH to p51 in insn #9 (nop 5)
rescanning insn with uid = 9.
starting the processing of deferred insns
ending the processing of deferred insns
df_analyze called
df_worklist_dataflow_doublequeue: n_basic_blocks 3 n_edges 2 count 3 ( 1)
Reg 49: local to bb 2 def dominates all uses has unique first use
Reg 48: local to bb 2 def dominates all uses has unique first use
Ignoring reg 48 with equiv init insn
Found def insn 14 for 49 to be not moveable
Building IRA IR
starting the processing of deferred insns
ending the processing of deferred insns
df_analyze called
Pass 0 for finding pseudo/allocno costs
a4 (r51,l0) best GENERAL_REGS, allocno GENERAL_REGS
a3 (r50,l0) best GENERAL_REGS, allocno GENERAL_REGS
a1 (r49,l0) best GENERAL_REGS, allocno GENERAL_REGS
a0 (r48,l0) best LD_REGS, allocno LD_REGS
a2 (r47,l0) best GENERAL_REGS, allocno GENERAL_REGS
a0(r48,l0) costs: POINTER_X_REGS:1000000 POINTER_Y_REGS:1000000
POINTER_Z_REGS:1000000 BASE_POINTER_REGS:1000000 POINTER_REGS:1000000
ADDW_REGS:1000000 SIMPLE_LD_REGS:1000000 LD_REGS:1000000 NO_LD_REGS:1002000
GENERAL_REGS:1002000 MEM:1004000
a1(r49,l0) costs: POINTER_X_REGS:1002000 POINTER_Y_REGS:1002000
POINTER_Z_REGS:1002000 BASE_POINTER_REGS:1002000 POINTER_REGS:1002000
ADDW_REGS:1002000 SIMPLE_LD_REGS:1002000 LD_REGS:1002000 NO_LD_REGS:1002000
GENERAL_REGS:1002000 MEM:1004000
a2(r47,l0) costs: POINTER_X_REGS:1000000 POINTER_Y_REGS:1000000
POINTER_Z_REGS:1000000 BASE_POINTER_REGS:1000000 POINTER_REGS:1000000
ADDW_REGS:1000000 SIMPLE_LD_REGS:1000000 LD_REGS:1000000 NO_LD_REGS:1000000
GENERAL_REGS:1000000 MEM:1000000
a3(r50,l0) costs: POINTER_X_REGS:1000000 POINTER_Y_REGS:1000000
POINTER_Z_REGS:1000000 BASE_POINTER_REGS:1000000 POINTER_REGS:1000000
ADDW_REGS:1000000 SIMPLE_LD_REGS:1000000 LD_REGS:1000000 NO_LD_REGS:1000000
GENERAL_REGS:1000000 MEM:1000000
a4(r51,l0) costs: POINTER_X_REGS:1000000 POINTER_Y_REGS:1000000
POINTER_Z_REGS:1000000 BASE_POINTER_REGS:1000000 POINTER_REGS:1000000
ADDW_REGS:1000000 SIMPLE_LD_REGS:1000000 LD_REGS:1000000 NO_LD_REGS:1000000
GENERAL_REGS:1000000 MEM:1000000
Pass 1 for finding pseudo/allocno costs
r51: preferred GENERAL_REGS, alternative NO_REGS, allocno GENERAL_REGS
r50: preferred GENERAL_REGS, alternative NO_REGS, allocno GENERAL_REGS
r49: preferred GENERAL_REGS, alternative NO_REGS, allocno GENERAL_REGS
r48: preferred LD_REGS, alternative GENERAL_REGS, allocno GENERAL_REGS
r47: preferred GENERAL_REGS, alternative NO_REGS, allocno GENERAL_REGS
a0(r48,l0) costs: LD_REGS:1000000 NO_LD_REGS:1002000 GENERAL_REGS:1002000
MEM:1004000
a1(r49,l0) costs: GENERAL_REGS:1002000 MEM:1004000
a2(r47,l0) costs: GENERAL_REGS:1000000 MEM:1000000
a3(r50,l0) costs: GENERAL_REGS:1000000 MEM:1000000
a4(r51,l0) costs: GENERAL_REGS:1000000 MEM:1000000
Insn 10(l0): point = 0
Insn 9(l0): point = 2
Insn 8(l0): point = 4
Insn 6(l0): point = 6
Insn 14(l0): point = 8
a0(r48 [0]): [3..6]
a0(r48 [1]): [3..6]
a1(r49 [0]): [3..8]
a1(r49 [1]): [3..8]
a2(r47 [0]): [2..2]
a2(r47 [1]): [2..2]
a3(r50 [0]): [2..2]
a3(r50 [1]): [2..2]
a4(r51): [2..2]
Compressing live ranges: from 11 to 3 - 27%
Ranges after the compression:
a0(r48 [0]): [1..2]
a0(r48 [1]): [1..2]
a1(r49 [0]): [1..2]
a1(r49 [1]): [1..2]
a2(r47 [0]): [0..0]
a2(r47 [1]): [0..0]
a3(r50 [0]): [0..0]
a3(r50 [1]): [0..0]
a4(r51): [0..0]
+++Allocating 72 bytes for conflict table (uncompressed size 72)
;; a0(r48,l0) conflicts:
;; subobject 0: a1(r49,w0,l0) a1(r49,w1,l0)
;; total conflict hard regs: 22-23
;; conflict hard regs: 22-23
;; subobject 1: a1(r49,w0,l0)
;; total conflict hard regs: 22-23
;; conflict hard regs: 22-23
;; a1(r49,l0) conflicts:
;; subobject 0: a0(r48,w0,l0) a0(r48,w1,l0)
;; total conflict hard regs: 22-23
;; conflict hard regs: 22-23
;; subobject 1: a0(r48,w0,l0)
;; total conflict hard regs: 22-23
;; conflict hard regs: 22-23
;; a2(r47,l0) conflicts:
;; subobject 0: a3(r50,w0,l0) a3(r50,w1,l0) a4(r51,l0)
;; total conflict hard regs: 22-25
;; conflict hard regs: 22-25
;; subobject 1: a3(r50,w0,l0) a4(r51,l0)
;; total conflict hard regs: 22-25
;; conflict hard regs: 22-25
;; a3(r50,l0) conflicts:
;; subobject 0: a2(r47,w0,l0) a2(r47,w1,l0) a4(r51,l0)
;; total conflict hard regs: 22-25
;; conflict hard regs: 22-25
;; subobject 1: a2(r47,w0,l0) a4(r51,l0)
;; total conflict hard regs: 22-25
;; conflict hard regs: 22-25
;; a4(r51,l0) conflicts: a2(r47,w0,l0) a2(r47,w1,l0) a3(r50,w0,l0) a3(r50,w1,l0)
;; total conflict hard regs: 22-25
;; conflict hard regs: 22-25
pref0:a1(r49)<-hr24@2000
regions=1, blocks=3, points=3
allocnos=5 (big 4), copies=0, conflicts=0, ranges=9
**** Allocnos coloring:
Loop 0 (parent -1, header bb2, depth 0)
bbs: 2
all: 0r48 1r49 2r47 3r50 4r51
modified regnos: 47 48 49 50 51
border:
Pressure: GENERAL_REGS=9
Removing pref0:hr24@2000
Hard reg set forest:
0:( 2-31)@0
1:( 2 4 6 8 10 12 14 16-21 24-31)@8000
2:( 2 4 6 8 10 12 14 16 18 20 24 26 28 30)@12000
3:( 2 4 6 8 10 12 14 16 18 20 26 28 30)@0
Allocno a0r48 of GENERAL_REGS(30) has 21 avail. regs 2 4 6 8 10 12 14
16-21 24-31, node: 2 4 6 8 10 12 14 16-21 24-31 obj 0 (confl regs = 0-1 22-23
32-36), obj 1 (confl regs = 0-1 22-23 32-36)
Allocno a1r49 of GENERAL_REGS(30) has 14 avail. regs 2 4 6 8 10 12 14 16
18 20 24 26 28 30, node: 2 4 6 8 10 12 14 16 18 20 24 26 28 30 obj 0 (confl
regs = 0-1 22-23 32-36), obj 1 (confl regs = 0-1 22-23 32-36)
Allocno a2r47 of GENERAL_REGS(30) has 13 avail. regs 2 4 6 8 10 12 14 16
18 20 26 28 30, node: 2 4 6 8 10 12 14 16 18 20 26 28 30 obj 0 (confl regs =
0-1 22-25 32-36), obj 1 (confl regs = 0-1 22-25 32-36)
Allocno a3r50 of GENERAL_REGS(30) has 13 avail. regs 2 4 6 8 10 12 14 16
18 20 26 28 30, node: 2 4 6 8 10 12 14 16 18 20 26 28 30 obj 0 (confl regs =
0-1 22-25 32-36), obj 1 (confl regs = 0-1 22-25 32-36)
Allocno a4r51 of GENERAL_REGS(30) has 26 avail. regs 2-21 26-31, ^node:
2-31 (confl regs = 0-1 22-25 32-36)
Forming thread from colorable bucket:
Pushing a4(r51,l0)(cost 0)
Pushing a3(r50,l0)(cost 0)
Pushing a2(r47,l0)(cost 0)
Pushing a1(r49,l0)(cost 0)
Pushing a0(r48,l0)(cost 0)
Popping a0(r48,l0) -- assign reg 18
Popping a1(r49,l0) -- assign reg 24
Popping a2(r47,l0) -- assign reg 18
Popping a3(r50,l0) -- assign reg 20
Popping a4(r51,l0) -- assign reg 30
Disposition:
2:r47 l0 18 0:r48 l0 18 1:r49 l0 24 3:r50 l0 20
4:r51 l0 30
New iteration of spill/restore move
+++Costs: overall 4998000, reg 4998000, mem 0, ld 0, st 0, move 0
+++ move loops 0, new jumps 0
foo
Dataflow summary:
;; fully invalidated by EH 0 [r0] 1 [r1] 18 [r18] 19 [r19] 20 [r20] 21
[r21] 22 [r22] 23 [r23] 24 [r24] 25 [r25] 26 [r26] 27 [r27] 30 [r30] 31 [r31]
33 [__SP_H__] 35 [argH] 36 [cc]
;; hardware regs used 28 [r28] 32 [__SP_L__] 34 [argL]
;; regular block artificial uses 28 [r28] 32 [__SP_L__] 34 [argL]
;; eh block artificial uses 28 [r28] 32 [__SP_L__] 34 [argL]
;; entry block defs 8 [r8] 9 [r9] 10 [r10] 11 [r11] 12 [r12] 13 [r13] 14
[r14] 15 [r15] 16 [r16] 17 [r17] 18 [r18] 19 [r19] 20 [r20] 21 [r21] 22 [r22]
23 [r23] 24 [r24] 25 [r25] 28 [r28] 32 [__SP_L__] 34 [argL]
;; exit block uses 28 [r28] 32 [__SP_L__]
;; regs ever live 22 [r22] 23 [r23] 24 [r24] 25 [r25] 32 [__SP_L__]
;; ref usage r0={1d} r1={1d} r8={1d} r9={1d} r10={1d} r11={1d} r12={1d}
r13={1d} r14={1d} r15={1d} r16={1d} r17={1d} r18={2d} r19={2d} r20={2d}
r21={2d} r22={3d,1u} r23={3d,1u} r24={3d,2u} r25={3d,2u} r26={1d} r27={1d}
r28={1d,2u} r30={1d} r31={1d} r32={1d,3u} r33={1d} r34={1d,1u} r35={1d}
r36={1d} r47={1d} r48={1d,2u} r49={1d,2u} r50={1d} r51={1d}
;; total ref usage 63{47d,16u,0e} in 5{4 regular + 1 call} insns.
(note 1 0 4 NOTE_INSN_DELETED)
;; basic block 2, loop depth 0, count 1073741824 (estimated locally, freq
1.0000), maybe hot
;; prev block 0, next block 1, flags: (REACHABLE, RTL, MODIFIED)
;; pred: ENTRY [always] count:1073741824 (estimated locally, freq
1.0000) (FALLTHRU)
;; bb 2 artificial_defs: { }
;; bb 2 artificial_uses: { u-1(28){ }u-1(32){ }u-1(34){ }}
;; lr in 24 [r24] 25 [r25] 28 [r28] 32 [__SP_L__] 34 [argL]
;; lr use 24 [r24] 25 [r25] 28 [r28] 32 [__SP_L__] 34 [argL]
;; lr def 0 [r0] 1 [r1] 18 [r18] 19 [r19] 20 [r20] 21 [r21] 22 [r22] 23
[r23] 24 [r24] 25 [r25] 26 [r26] 27 [r27] 30 [r30] 31 [r31] 33 [__SP_H__] 35
[argH] 36 [cc] 47 48 49 50 51
(note 4 1 14 2 [bb 2] NOTE_INSN_BASIC_BLOCK)
(insn 14 4 2 2 (set (reg:HI 49 [ k ])
(reg:HI 24 r24 [ k ])) "spill.c":4:1 128 {*movhi_split}
(expr_list:REG_DEAD (reg:HI 24 r24 [ k ])
(nil)))
(note 2 14 3 2 NOTE_INSN_DELETED)
(note 3 2 6 2 NOTE_INSN_FUNCTION_BEG)
(insn 6 3 7 2 (set (reg:HI 48)
(const_int 5 [0x5])) "spill.c":5:5 128 {*movhi_split}
(expr_list:REG_EQUIV (const_int 5 [0x5])
(nil)))
(note 7 6 8 2 NOTE_INSN_DELETED)
(insn 8 7 9 2 (set (reg:HI 22 r22)
(symbol_ref/f:HI ("*.LC0") [flags 0x2] <var_decl 0x7efdf6ba0d10
*.LC0>)) "spill.c":5:5 128 {*movhi_split}
(nil))
(insn 9 8 10 2 (parallel [
(set (reg:HI 24 r24)
(div:HI (reg:HI 49 [ k ])
(reg:HI 48)))
(set (reg:HI 47)
(mod:HI (reg:HI 49 [ k ])
(reg:HI 48)))
(clobber (reg:HI 50))
(clobber (reg:QI 51))
]) "spill.c":5:5 588 {divmodhi4}
(expr_list:REG_DEAD (reg:HI 49 [ k ])
(expr_list:REG_DEAD (reg:HI 48)
(expr_list:REG_UNUSED (reg:QI 51)
(expr_list:REG_UNUSED (reg:HI 50)
(expr_list:REG_UNUSED (reg:HI 47)
(nil)))))))
(call_insn/j 10 9 11 2 (parallel [
(call (mem:HI (symbol_ref:HI ("bar") [flags 0x41] <function_decl
0x7efdf6baa600 bar>) [0 bar S2 A8])
(const_int 0 [0]))
(use (const_int 1 [0x1]))
]) "spill.c":5:5 961 {call_insn}
(expr_list:REG_DEAD (reg:HI 24 r24)
(expr_list:REG_DEAD (reg:HI 22 r22)
(expr_list:REG_CALL_DECL (symbol_ref:HI ("bar") [flags 0x41]
<function_decl 0x7efdf6baa600 bar>)
(nil))))
(expr_list:HI (use (reg:HI 24 r24))
(expr_list:HI (use (reg:HI 22 r22))
(nil))))
;; succ: EXIT [always] count:1073741824 (estimated locally, freq
1.0000) (ABNORMAL,SIBCALL)
;; lr out 28 [r28] 32 [__SP_L__] 34 [argL]
(barrier 11 10 0)
;; Function foo (foo, funcdef_no=0, decl_uid=2020, cgraph_uid=1, symbol_order=0)
********** Local #1: **********
Spilling non-eliminable hard regs: 32 33
New elimination table:
Can eliminate 34 to 32 (offset=3, prev_offset=-1)
Can eliminate 34 to 28 (offset=3, prev_offset=-1)
Can eliminate 28 to 32 (offset=0, prev_offset=-1)
Considering alt=0 of insn 6: (0) =r (1) r
1 Operand reload: losers++
1 Non-pseudo reload: reject+=2
1 Small class reload: reject+=3
1 Non input pseudo reload: reject++
Cycle danger: overall += LRA_MAX_REJECT
overall=612,losers=1,rld_nregs=2
Considering alt=1 of insn 6: (0) r (1) Y00
Bad operand -- refuse
Considering alt=2 of insn 6: (0) r (1) m
1 Operand reload: losers++
1 Spill Non-pseudo into memory: reject+=3
Using memory insn operand 1: reject+=3
1 Non input pseudo reload: reject++
overall=13,losers=1,rld_nregs=0
Considering alt=3 of insn 6: (0) m (1) rY00
0 Operand reload: losers++
0 Spill pseudo into memory: reject+=3
Using memory insn operand 0: reject+=3
0 Non input pseudo reload: reject++
1 Operand reload: losers++
1 Non-pseudo reload: reject+=2
1 Small class reload: reject+=3
1 Non input pseudo reload: reject++
overall=25,losers=2 -- refuse
Considering alt=4 of insn 6: (0) d (1) i
overall=0,losers=0,rld_nregs=0
Choosing alt 4 in insn 6: (0) d (1) i {*movhi_split}
Considering alt=0 of insn 8: (0) =r (1) r
1 Operand reload: losers++
1 Non-pseudo reload: reject+=2
1 Small class reload: reject+=3
1 Non input pseudo reload: reject++
Cycle danger: overall += LRA_MAX_REJECT
overall=612,losers=1,rld_nregs=2
Considering alt=1 of insn 8: (0) r (1) Y00
Bad operand -- refuse
Considering alt=2 of insn 8: (0) r (1) m
1 Operand reload: losers++
1 Spill Non-pseudo into memory: reject+=3
Using memory insn operand 1: reject+=3
1 Non input pseudo reload: reject++
overall=13,losers=1,rld_nregs=0
Considering alt=3 of insn 8: (0) m (1) rY00
0 Operand reload: losers++
0 Non-pseudo reload: reject+=2
0 Spill pseudo into memory: reject+=3
Using memory insn operand 0: reject+=3
0 Non input pseudo reload: reject++
overall=15,losers=1 -- refuse
Considering alt=4 of insn 8: (0) d (1) i
overall=0,losers=0,rld_nregs=0
Choosing alt 4 in insn 8: (0) d (1) i {*movhi_split}
Considering alt=0 of insn 9: (0) ={r22} (1) {r24} (2) {r22} (3)
={r24} (4) ={r26} (5) ={r21}
0 Operand reload: losers++
0 Non-pseudo reload: reject+=2
0 Small class reload: reject+=3
0 Non input pseudo reload: reject++
2 Operand reload: losers++
2 Small class reload: reject+=3
3 Operand reload: losers++
3 Small class reload: reject+=3
3 Non input pseudo reload: reject++
4 Operand reload: losers++
4 Small class reload: reject+=3
4 Non input pseudo reload: reject++
5 Operand reload: losers++
5 Small class reload: reject+=3
5 Non input pseudo reload: reject++
overall=51,losers=5,rld_nregs=9
Choosing alt 0 in insn 9: (0) ={r22} (1) {r24} (2) {r22} (3) ={r24}
(4) ={r26} (5) ={r21} {divmodhi4}
Creating newreg=53 from oldreg=24, assigning class GENERAL_REGS to r53
Creating newreg=54 from oldreg=48, assigning class GENERAL_REGS to r54
Creating newreg=55 from oldreg=47, assigning class GENERAL_REGS to r55
Creating newreg=56 from oldreg=50, assigning class GENERAL_REGS to r56
Creating newreg=57 from oldreg=51, assigning class GENERAL_REGS to r57
9: {r53:HI=r49:HI/r54:HI;r55:HI=r49:HI%r54:HI;clobber r56:HI;clobber
r57:QI;}
REG_DEAD r49:HI
REG_DEAD r48:HI
REG_UNUSED r51:QI
REG_UNUSED r50:HI
REG_UNUSED r47:HI
Inserting insn reload before:
17: r54:HI=r48:HI
Inserting insn reload after:
16: r24:HI=r53:HI
Considering alt=0 of insn 10: (0) z (1) X (2) L
0 Operand reload: losers++
0 Non-pseudo reload: reject+=2
0 Small class reload: reject+=3
0 Non input pseudo reload: reject++
Bad operand -- refuse
Considering alt=1 of insn 10: (0) s (1) X (2) L
Bad operand -- refuse
Considering alt=2 of insn 10: (0) z (1) X (2) P
0 Operand reload: losers++
0 Non-pseudo reload: reject+=2
0 Small class reload: reject+=3
0 Non input pseudo reload: reject++
overall=12,losers=1,rld_nregs=2
Considering alt=3 of insn 10: (0) s (1) X (2) P
overall=0,losers=0,rld_nregs=0
Choosing alt 3 in insn 10: (0) s (1) X (2) P {call_insn}
Spilling non-eliminable hard regs: 32 33
********** Inheritance #1: **********
EBB 2
********** Pseudo live ranges #1: **********
BB 2
Insn 10: point = 0, n_alt = 3
Insn 16: point = 0, n_alt = -2
Hard reg 24 is preferable by r53 with profit 1000
Insn 9: point = 1, n_alt = 0
Insn 17: point = 3, n_alt = -2
Hard reg 18 is preferable by r54 with profit 1000
Insn 8: point = 5, n_alt = 4
Insn 6: point = 5, n_alt = 4
Insn 14: point = 6, n_alt = -2
r48: [4..5]
r49: [2..6]
r53: [0..1]
r54: [2..3]
r55: [1..1]
r56: [1..1]
r57: [1..1]
Compressing live ranges: from 7 to 6 - 85%
Ranges after the compression:
r48: [4..5]
r49: [2..5]
r53: [0..1]
r54: [2..3]
r55: [1..1]
r56: [1..1]
r57: [1..1]
********** Assignment #1: **********
Assigning to 53 (cl=GENERAL_REGS, orig=53, freq=2000, tfirst=53,
tfreq=2000)...
Trying 24:
Trying 25:
Trying 18:
Trying 19:
Trying 20:
Trying 21:
Trying 22:
Trying 23:
Trying 30:
Trying 31:
Trying 26:
Trying 27:
Trying 28:
Trying 29:
Trying 17:
Trying 16:
Trying 15:
Trying 14:
Trying 13:
Trying 12:
Trying 11:
Trying 10:
Trying 9:
Trying 8:
Trying 7:
Trying 6:
Trying 5:
Trying 4:
Trying 3:
Trying 2:
Assigning to 54 (cl=GENERAL_REGS, orig=48, freq=2000, tfirst=54,
tfreq=2000)...
Trying 24: spill 49(freq=2000)
Trying 25: spill 49(freq=2000)
Trying 18:
Trying 19:
Trying 20:
Trying 21:
Trying 22:
Trying 23: spill 49(freq=2000)
Trying 30:
Trying 31:
Trying 26:
Trying 27:
Trying 28:
Trying 29:
Trying 17:
Trying 16:
Trying 15:
Trying 14:
Trying 13:
Trying 12:
Trying 11:
Trying 10:
Trying 9:
Trying 8:
Trying 7:
Trying 6:
Trying 5:
Trying 4:
Trying 3:
Trying 2:
Assigning to 55 (cl=GENERAL_REGS, orig=47, freq=1000, tfirst=55,
tfreq=1000)...
Assign 24 to reload r55 (freq=1000)
Assigning to 56 (cl=GENERAL_REGS, orig=50, freq=1000, tfirst=56,
tfreq=1000)...
Assign 26 to reload r56 (freq=1000)
Assigning to 57 (cl=GENERAL_REGS, orig=51, freq=1000, tfirst=57,
tfreq=1000)...
Assign 21 to reload r57 (freq=1000)
2nd iter for reload pseudo assignments:
Reload r53 assignment failure
Reload r54 assignment failure
Spill reload r57(hr=21, freq=1000)
Spill reload r56(hr=26, freq=1000)
Spill reload r55(hr=24, freq=1000)
Spill r49(hr=24, freq=2000)
Assigning to 53 (cl=GENERAL_REGS, orig=53, freq=2000, tfirst=53,
tfreq=2000)...
Trying 24:
Trying 25:
Trying 18:
Trying 19:
Trying 20:
Trying 21:
Trying 22:
Trying 23:
Trying 30:
Trying 31:
Trying 26:
Trying 27:
Trying 28:
Trying 29:
Trying 17:
Trying 16:
Trying 15:
Trying 14:
Trying 13:
Trying 12:
Trying 11:
Trying 10:
Trying 9:
Trying 8:
Trying 7:
Trying 6:
Trying 5:
Trying 4:
Trying 3:
Trying 2:
Assigning to 54 (cl=GENERAL_REGS, orig=48, freq=2000, tfirst=54,
tfreq=2000)...
Trying 24:
Trying 25:
Trying 18:
Trying 19:
Trying 20:
Trying 21:
Trying 22:
Trying 23:
Trying 30:
Trying 31:
Trying 26:
Trying 27:
Trying 28:
Trying 29:
Trying 17:
Trying 16:
Trying 15:
Trying 14:
Trying 13:
Trying 12:
Trying 11:
Trying 10:
Trying 9:
Trying 8:
Trying 7:
Trying 6:
Trying 5:
Trying 4:
Trying 3:
Trying 2:
Assigning to 55 (cl=GENERAL_REGS, orig=47, freq=1000, tfirst=55,
tfreq=1000)...
Assign 24 to reload r55 (freq=1000)
Assigning to 56 (cl=GENERAL_REGS, orig=50, freq=1000, tfirst=56,
tfreq=1000)...
Assign 26 to reload r56 (freq=1000)
Assigning to 57 (cl=GENERAL_REGS, orig=51, freq=1000, tfirst=57,
tfreq=1000)...
Assign 21 to reload r57 (freq=1000)
Reassigning non-reload pseudos
Assign 24 to r49 (freq=2000)
********** Undoing inheritance #1: **********
****** Splitting a hard reg after assignment #1: ******
((((((((((((((((((((((((((((((((((((((((((((((((
Creating newreg=58 from oldreg=22, assigning class SIMPLE_LD_REGS to
split r58
16: r24:HI=r53:HI
REG_DEAD r53:HI
Add reg<-split after:
19: r22:QI=r58:QI
9: {r53:HI=r49:HI/r54:HI;r55:HI=r49:HI%r54:HI;clobber r56:HI;clobber
r57:QI;}
REG_UNUSED r57:QI
REG_UNUSED r56:HI
REG_UNUSED r55:HI
REG_DEAD r54:HI
REG_DEAD r49:HI
Add split<-reg before:
18: r58:QI=r22:QI
))))))))))))))))))))))))))))))))))))))))))))))))
********** Pseudo live ranges #2: **********
BB 2
Insn 10: point = 0, n_alt = 3
Insn 19: point = 0, n_alt = -1
Hard reg 22 is preferable by r58 with profit 1000
Insn 16: point = 1, n_alt = -2
Hard reg 24 is preferable by r53 with profit 1000
Insn 9: point = 2, n_alt = -1
Insn 18: point = 4, n_alt = -1
Hard reg 22 is preferable by r58 with profit 2000
Insn 17: point = 5, n_alt = -2
Hard reg 18 is preferable by r54 with profit 1000
Insn 8: point = 7, n_alt = 4
Insn 6: point = 7, n_alt = 4
Insn 14: point = 8, n_alt = -1
r48: [6..7]
r49: [3..8]
r53: [1..2]
r54: [3..5]
r55: [2..2]
r56: [2..2]
r57: [2..2]
r58: [0..4]
Compressing live ranges: from 9 to 6 - 66%
Ranges after the compression:
r48: [4..5]
r49: [2..5]
r53: [0..1]
r54: [2..3]
r55: [1..1]
r56: [1..1]
r57: [1..1]
r58: [0..3]
********** Assignment #2: **********
Assigning to 53 (cl=GENERAL_REGS, orig=53, freq=2000, tfirst=53,
tfreq=2000)...
Trying 18:
Trying 19:
Trying 22: spill 58(freq=2000)
Trying 30:
Trying 31:
Trying 28:
Trying 29:
Trying 17:
Trying 16:
Trying 15:
Trying 14:
Trying 13:
Trying 12:
Trying 11:
Trying 10:
Trying 9:
Trying 8:
Trying 7:
Trying 6:
Trying 5:
Trying 4:
Trying 3:
Trying 2:
Assigning to 54 (cl=GENERAL_REGS, orig=48, freq=2000, tfirst=54,
tfreq=2000)...
Trying 24: spill 49(freq=2000)
Trying 25: spill 49(freq=2000)
Trying 18:
Trying 19:
Trying 20:
Trying 21: spill 58(freq=2000)
Trying 22: spill 58(freq=2000)
Trying 23: spill 49(freq=2000)
Trying 30:
Trying 31:
Trying 26:
Trying 27:
Trying 28:
Trying 29:
Trying 17:
Trying 16:
Trying 15:
Trying 14:
Trying 13:
Trying 12:
Trying 11:
Trying 10:
Trying 9:
Trying 8:
Trying 7:
Trying 6:
Trying 5:
Trying 4:
Trying 3:
Trying 2:
2nd iter for reload pseudo assignments:
Reload r53 assignment failure
Reload r54 assignment failure
Spill split r58(hr=22, freq=2000)
Spill reload r57(hr=21, freq=1000)
Spill reload r56(hr=26, freq=1000)
Spill reload r55(hr=24, freq=1000)
Spill r49(hr=24, freq=2000)
Assigning to 58 (cl=SIMPLE_LD_REGS, orig=58, freq=2000, tfirst=58,
tfreq=2000)...
Assign 18 to split r58 (freq=2000)
Assigning to 53 (cl=GENERAL_REGS, orig=53, freq=2000, tfirst=53,
tfreq=2000)...
Trying 24:
Trying 25:
Trying 18: spill 58(freq=2000)
Trying 19:
Trying 20:
Trying 21:
Trying 22:
Trying 23:
Trying 30:
Trying 31:
Trying 26:
Trying 27:
Trying 28:
Trying 29:
Trying 17: spill 58(freq=2000)
Trying 16:
Trying 15:
Trying 14:
Trying 13:
Trying 12:
Trying 11:
Trying 10:
Trying 9:
Trying 8:
Trying 7:
Trying 6:
Trying 5:
Trying 4:
Trying 3:
Trying 2:
Assigning to 54 (cl=GENERAL_REGS, orig=48, freq=2000, tfirst=54,
tfreq=2000)...
Trying 24:
Trying 25:
Trying 18: spill 58(freq=2000)
Trying 19:
Trying 20:
Trying 21:
Trying 22:
Trying 23:
Trying 30:
Trying 31:
Trying 26:
Trying 27:
Trying 28:
Trying 29:
Trying 17: spill 58(freq=2000)
Trying 16:
Trying 15:
Trying 14:
Trying 13:
Trying 12:
Trying 11:
Trying 10:
Trying 9:
Trying 8:
Trying 7:
Trying 6:
Trying 5:
Trying 4:
Trying 3:
Trying 2:
Assigning to 55 (cl=GENERAL_REGS, orig=47, freq=1000, tfirst=55,
tfreq=1000)...
Assign 24 to reload r55 (freq=1000)
Assigning to 56 (cl=GENERAL_REGS, orig=50, freq=1000, tfirst=56,
tfreq=1000)...
Assign 26 to reload r56 (freq=1000)
Assigning to 57 (cl=GENERAL_REGS, orig=51, freq=1000, tfirst=57,
tfreq=1000)...
Assign 21 to reload r57 (freq=1000)
Reassigning non-reload pseudos
Assign 24 to r49 (freq=2000)
****** Splitting a hard reg after assignment #2: ******
((((((((((((((((((((((((((((((((((((((((((((((((
Creating newreg=59 from oldreg=23, assigning class SIMPLE_LD_REGS to
split r59
16: r24:HI=r53:HI
REG_DEAD r53:HI
Add reg<-split after:
21: r23:QI=r59:QI
9: {r53:HI=r49:HI/r54:HI;r55:HI=r49:HI%r54:HI;clobber r56:HI;clobber
r57:QI;}
REG_UNUSED r57:QI
REG_UNUSED r56:HI
REG_UNUSED r55:HI
REG_DEAD r54:HI
REG_DEAD r49:HI
Add split<-reg before:
20: r59:QI=r23:QI
))))))))))))))))))))))))))))))))))))))))))))))))
********** Pseudo live ranges #3: **********
BB 2
Insn 10: point = 0, n_alt = 3
Insn 19: point = 0, n_alt = -1
Hard reg 22 is preferable by r58 with profit 1000
Insn 21: point = 1, n_alt = -1
Hard reg 23 is preferable by r59 with profit 1000
Insn 16: point = 2, n_alt = -2
Hard reg 24 is preferable by r53 with profit 1000
Insn 9: point = 3, n_alt = -1
Insn 20: point = 5, n_alt = -1
Hard reg 23 is preferable by r59 with profit 2000
Insn 18: point = 6, n_alt = -1
Hard reg 22 is preferable by r58 with profit 2000
Insn 17: point = 7, n_alt = -2
Hard reg 18 is preferable by r54 with profit 1000
Insn 8: point = 9, n_alt = 4
Insn 6: point = 9, n_alt = 4
Insn 14: point = 10, n_alt = -1
r48: [8..9]
r49: [4..10]
r53: [2..3]
r54: [4..7]
r55: [3..3]
r56: [3..3]
r57: [3..3]
r58: [0..6]
r59: [1..5]
Compressing live ranges: from 11 to 6 - 54%
Ranges after the compression:
r48: [4..5]
r49: [2..5]
r53: [0..1]
r54: [2..3]
r55: [1..1]
r56: [1..1]
r57: [1..1]
r58: [0..3]
r59: [0..3]
********** Assignment #3: **********
Assigning to 53 (cl=GENERAL_REGS, orig=53, freq=2000, tfirst=53,
tfreq=2000)...
Trying 18: spill 58(freq=2000)
Trying 19:
Trying 22: spill 59(freq=2000) Now best 22(cost=0, bad_spills=0,
insn_pseudos=0)
Trying 30:
Trying 31:
Trying 28:
Trying 29:
Trying 17: spill 58(freq=2000)
Trying 16:
Trying 15:
Trying 14:
Trying 13:
Trying 12:
Trying 11:
Trying 10:
Trying 9:
Trying 8:
Trying 7:
Trying 6:
Trying 5:
Trying 4:
Trying 3:
Trying 2:
Spill split r59(hr=23, freq=2000) for r53
Assign 22 to reload r53 (freq=2000)
Assigning to 54 (cl=GENERAL_REGS, orig=48, freq=2000, tfirst=54,
tfreq=2000)...
Trying 24: spill 49(freq=2000)
Trying 25: spill 49(freq=2000)
Trying 18: spill 58(freq=2000)
Trying 19:
Trying 20:
Trying 21:
Trying 22:
Trying 23: spill 49(freq=2000)
Trying 30:
Trying 31:
Trying 26:
Trying 27:
Trying 28:
Trying 29:
Trying 17: spill 58(freq=2000)
Trying 16:
Trying 15:
Trying 14:
Trying 13:
Trying 12:
Trying 11:
Trying 10:
Trying 9:
Trying 8:
Trying 7:
Trying 6:
Trying 5:
Trying 4:
Trying 3:
Trying 2:
2nd iter for reload pseudo assignments:
Reload r54 assignment failure
Spill r49(hr=24, freq=2000)
Spill split r58(hr=18, freq=2000)
Assigning to 58 (cl=SIMPLE_LD_REGS, orig=58, freq=2000, tfirst=58,
tfreq=2000)...
Assign 18 to split r58 (freq=2000)
Assigning to 54 (cl=GENERAL_REGS, orig=48, freq=2000, tfirst=54,
tfreq=2000)...
Trying 24:
Trying 25:
Trying 18: spill 58(freq=2000)
Trying 19:
Trying 20:
Trying 21:
Trying 22:
Trying 23:
Trying 30:
Trying 31:
Trying 26:
Trying 27:
Trying 28:
Trying 29:
Trying 17: spill 58(freq=2000)
Trying 16:
Trying 15:
Trying 14:
Trying 13:
Trying 12:
Trying 11:
Trying 10:
Trying 9:
Trying 8:
Trying 7:
Trying 6:
Trying 5:
Trying 4:
Trying 3:
Trying 2:
Reassigning non-reload pseudos
Assign 24 to r49 (freq=2000)
Assign 19 to split r59 (freq=2000)
****** Splitting a hard reg after assignment #3: ******
********** Pseudo live ranges #4: **********
BB 2
Insn 10: point = 0, n_alt = 3
Insn 19: point = 0, n_alt = -1
Hard reg 22 is preferable by r58 with profit 1000
Insn 21: point = 1, n_alt = -1
Hard reg 23 is preferable by r59 with profit 1000
Insn 16: point = 2, n_alt = -2
Hard reg 24 is preferable by r53 with profit 1000
Insn 9: point = 3, n_alt = -1
Insn 20: point = 5, n_alt = -1
Hard reg 23 is preferable by r59 with profit 2000
Insn 18: point = 6, n_alt = -1
Hard reg 22 is preferable by r58 with profit 2000
Insn 17: point = 7, n_alt = -2
Hard reg 18 is preferable by r54 with profit 1000
Insn 8: point = 9, n_alt = 4
Insn 6: point = 9, n_alt = 4
Insn 14: point = 10, n_alt = -1
r48: [8..9]
r49: [4..10]
r53: [2..3]
r54: [4..7]
r55: [3..3]
r56: [3..3]
r57: [3..3]
r58: [0..6]
r59: [1..5]
Compressing live ranges: from 11 to 6 - 54%
Ranges after the compression:
r48: [4..5]
r49: [2..5]
r53: [0..1]
r54: [2..3]
r55: [1..1]
r56: [1..1]
r57: [1..1]
r58: [0..3]
r59: [0..3]
********** Assignment #4: **********
Assigning to 54 (cl=GENERAL_REGS, orig=48, freq=2000, tfirst=54,
tfreq=2000)...
Trying 24: spill 49(freq=2000)
Trying 25: spill 49(freq=2000)
Trying 18: spill 58(freq=2000) spill 59(freq=2000)
Trying 19: spill 59(freq=2000)
Trying 20:
Trying 21:
Trying 22:
Trying 23: spill 49(freq=2000)
Trying 30:
Trying 31:
Trying 26:
Trying 27:
Trying 28:
Trying 29:
Trying 17: spill 58(freq=2000)
Trying 16:
Trying 15:
Trying 14:
Trying 13:
Trying 12:
Trying 11:
Trying 10:
Trying 9:
Trying 8:
Trying 7:
Trying 6:
Trying 5:
Trying 4:
Trying 3:
Trying 2:
2nd iter for reload pseudo assignments:
Reload r54 assignment failure
Spill r49(hr=24, freq=2000)
Spill split r58(hr=18, freq=2000)
Spill split r59(hr=19, freq=2000)
Assigning to 58 (cl=SIMPLE_LD_REGS, orig=58, freq=2000, tfirst=58,
tfreq=2000)...
Assign 18 to split r58 (freq=2000)
Assigning to 59 (cl=SIMPLE_LD_REGS, orig=59, freq=2000, tfirst=59,
tfreq=2000)...
Assign 19 to split r59 (freq=2000)
Assigning to 54 (cl=GENERAL_REGS, orig=48, freq=2000, tfirst=54,
tfreq=2000)...
Trying 24:
Trying 25:
Trying 18: spill 58(freq=2000) spill 59(freq=2000)
Trying 19: spill 59(freq=2000)
Trying 20:
Trying 21:
Trying 22:
Trying 23:
Trying 30:
Trying 31:
Trying 26:
Trying 27:
Trying 28:
Trying 29:
Trying 17: spill 58(freq=2000)
Trying 16:
Trying 15:
Trying 14:
Trying 13:
Trying 12:
Trying 11:
Trying 10:
Trying 9:
Trying 8:
Trying 7:
Trying 6:
Trying 5:
Trying 4:
Trying 3:
Trying 2:
Reassigning non-reload pseudos
Assign 24 to r49 (freq=2000)
****** Splitting a hard reg after assignment #4: ******
********** Pseudo live ranges #5: **********
BB 2
Insn 10: point = 0, n_alt = 3
Insn 19: point = 0, n_alt = -1
Hard reg 22 is preferable by r58 with profit 1000
Insn 21: point = 1, n_alt = -1
Hard reg 23 is preferable by r59 with profit 1000
Insn 16: point = 2, n_alt = -2
Hard reg 24 is preferable by r53 with profit 1000
Insn 9: point = 3, n_alt = -1
Insn 20: point = 5, n_alt = -1
Hard reg 23 is preferable by r59 with profit 2000
Insn 18: point = 6, n_alt = -1
Hard reg 22 is preferable by r58 with profit 2000
Insn 17: point = 7, n_alt = -2
Hard reg 18 is preferable by r54 with profit 1000
Insn 8: point = 9, n_alt = 4
Insn 6: point = 9, n_alt = 4
Insn 14: point = 10, n_alt = -1
r48: [8..9]
r49: [4..10]
r53: [2..3]
r54: [4..7]
r55: [3..3]
r56: [3..3]
r57: [3..3]
r58: [0..6]
r59: [1..5]
Compressing live ranges: from 11 to 6 - 54%
Ranges after the compression:
r48: [4..5]
r49: [2..5]
r53: [0..1]
r54: [2..3]
r55: [1..1]
r56: [1..1]
r57: [1..1]
r58: [0..3]
r59: [0..3]
********** Assignment #5: **********
Assigning to 54 (cl=GENERAL_REGS, orig=48, freq=2000, tfirst=54,
tfreq=2000)...
Trying 24: spill 49(freq=2000)
Trying 25: spill 49(freq=2000)
Trying 18: spill 58(freq=2000) spill 59(freq=2000)
Trying 19: spill 59(freq=2000)
Trying 20:
Trying 21:
Trying 22:
Trying 23: spill 49(freq=2000)
Trying 30:
Trying 31:
Trying 26:
Trying 27:
Trying 28:
Trying 29:
Trying 17: spill 58(freq=2000)
Trying 16:
Trying 15:
Trying 14:
Trying 13:
Trying 12:
Trying 11:
Trying 10:
Trying 9:
Trying 8:
Trying 7:
Trying 6:
Trying 5:
Trying 4:
Trying 3:
Trying 2:
2nd iter for reload pseudo assignments:
Reload r54 assignment failure
Spill r49(hr=24, freq=2000)
Spill split r58(hr=18, freq=2000)
Spill split r59(hr=19, freq=2000)
Assigning to 58 (cl=SIMPLE_LD_REGS, orig=58, freq=2000, tfirst=58,
tfreq=2000)...
Assign 18 to split r58 (freq=2000)
Assigning to 59 (cl=SIMPLE_LD_REGS, orig=59, freq=2000, tfirst=59,
tfreq=2000)...
Assign 19 to split r59 (freq=2000)
Assigning to 54 (cl=GENERAL_REGS, orig=48, freq=2000, tfirst=54,
tfreq=2000)...
Trying 24:
Trying 25:
Trying 18: spill 58(freq=2000) spill 59(freq=2000)
Trying 19: spill 59(freq=2000)
Trying 20:
Trying 21:
Trying 22:
Trying 23:
Trying 30:
Trying 31:
Trying 26:
Trying 27:
Trying 28:
Trying 29:
Trying 17: spill 58(freq=2000)
Trying 16:
Trying 15:
Trying 14:
Trying 13:
Trying 12:
Trying 11:
Trying 10:
Trying 9:
Trying 8:
Trying 7:
Trying 6:
Trying 5:
Trying 4:
Trying 3:
Trying 2:
Reassigning non-reload pseudos
Assign 24 to r49 (freq=2000)
****** Splitting a hard reg after assignment #5: ******
********** Pseudo live ranges #6: **********
BB 2
Insn 10: point = 0, n_alt = 3
Insn 19: point = 0, n_alt = -1
Hard reg 22 is preferable by r58 with profit 1000
Insn 21: point = 1, n_alt = -1
Hard reg 23 is preferable by r59 with profit 1000
Insn 16: point = 2, n_alt = -2
Hard reg 24 is preferable by r53 with profit 1000
Insn 9: point = 3, n_alt = -1
Insn 20: point = 5, n_alt = -1
Hard reg 23 is preferable by r59 with profit 2000
Insn 18: point = 6, n_alt = -1
Hard reg 22 is preferable by r58 with profit 2000
Insn 17: point = 7, n_alt = -2
Hard reg 18 is preferable by r54 with profit 1000
Insn 8: point = 9, n_alt = 4
Insn 6: point = 9, n_alt = 4
Insn 14: point = 10, n_alt = -1
r48: [8..9]
r49: [4..10]
r53: [2..3]
r54: [4..7]
r55: [3..3]
r56: [3..3]
r57: [3..3]
r58: [0..6]
r59: [1..5]
Compressing live ranges: from 11 to 6 - 54%
Ranges after the compression:
r48: [4..5]
r49: [2..5]
r53: [0..1]
r54: [2..3]
r55: [1..1]
r56: [1..1]
r57: [1..1]
r58: [0..3]
r59: [0..3]
********** Assignment #6: **********
Assigning to 54 (cl=GENERAL_REGS, orig=48, freq=2000, tfirst=54,
tfreq=2000)...
Trying 24: spill 49(freq=2000)
Trying 25: spill 49(freq=2000)
Trying 18: spill 58(freq=2000) spill 59(freq=2000)
Trying 19: spill 59(freq=2000)
Trying 20:
Trying 21:
Trying 22:
Trying 23: spill 49(freq=2000)
Trying 30:
Trying 31:
Trying 26:
Trying 27:
Trying 28:
Trying 29:
Trying 17: spill 58(freq=2000)
Trying 16:
Trying 15:
Trying 14:
Trying 13:
Trying 12:
Trying 11:
Trying 10:
Trying 9:
Trying 8:
Trying 7:
Trying 6:
Trying 5:
Trying 4:
Trying 3:
Trying 2:
2nd iter for reload pseudo assignments:
Reload r54 assignment failure
Spill r49(hr=24, freq=2000)
Spill split r58(hr=18, freq=2000)
Spill split r59(hr=19, freq=2000)
Assigning to 58 (cl=SIMPLE_LD_REGS, orig=58, freq=2000, tfirst=58,
tfreq=2000)...
Assign 18 to split r58 (freq=2000)
Assigning to 59 (cl=SIMPLE_LD_REGS, orig=59, freq=2000, tfirst=59,
tfreq=2000)...
Assign 19 to split r59 (freq=2000)
Assigning to 54 (cl=GENERAL_REGS, orig=48, freq=2000, tfirst=54,
tfreq=2000)...
Trying 24:
Trying 25:
Trying 18: spill 58(freq=2000) spill 59(freq=2000)
Trying 19: spill 59(freq=2000)
Trying 20:
Trying 21:
Trying 22:
Trying 23:
Trying 30:
Trying 31:
Trying 26:
Trying 27:
Trying 28:
Trying 29:
Trying 17: spill 58(freq=2000)
Trying 16:
Trying 15:
Trying 14:
Trying 13:
Trying 12:
Trying 11:
Trying 10:
Trying 9:
Trying 8:
Trying 7:
Trying 6:
Trying 5:
Trying 4:
Trying 3:
Trying 2:
Reassigning non-reload pseudos
Assign 24 to r49 (freq=2000)
****** Splitting a hard reg after assignment #6: ******
********** Pseudo live ranges #7: **********
BB 2
Insn 10: point = 0, n_alt = 3
Insn 19: point = 0, n_alt = -1
Hard reg 22 is preferable by r58 with profit 1000
Insn 21: point = 1, n_alt = -1
Hard reg 23 is preferable by r59 with profit 1000
Insn 16: point = 2, n_alt = -2
Hard reg 24 is preferable by r53 with profit 1000
Insn 9: point = 3, n_alt = -1
Insn 20: point = 5, n_alt = -1
Hard reg 23 is preferable by r59 with profit 2000
Insn 18: point = 6, n_alt = -1
Hard reg 22 is preferable by r58 with profit 2000
Insn 17: point = 7, n_alt = -2
Hard reg 18 is preferable by r54 with profit 1000
Insn 8: point = 9, n_alt = 4
Insn 6: point = 9, n_alt = 4
Insn 14: point = 10, n_alt = -1
r48: [8..9]
r49: [4..10]
r53: [2..3]
r54: [4..7]
r55: [3..3]
r56: [3..3]
r57: [3..3]
r58: [0..6]
r59: [1..5]
Compressing live ranges: from 11 to 6 - 54%
Ranges after the compression:
r48: [4..5]
r49: [2..5]
r53: [0..1]
r54: [2..3]
r55: [1..1]
r56: [1..1]
r57: [1..1]
r58: [0..3]
r59: [0..3]
********** Assignment #7: **********
Assigning to 54 (cl=GENERAL_REGS, orig=48, freq=2000, tfirst=54,
tfreq=2000)...
Trying 24: spill 49(freq=2000)
Trying 25: spill 49(freq=2000)
Trying 18: spill 58(freq=2000) spill 59(freq=2000)
Trying 19: spill 59(freq=2000)
Trying 20:
Trying 21:
Trying 22:
Trying 23: spill 49(freq=2000)
Trying 30:
Trying 31:
Trying 26:
Trying 27:
Trying 28:
Trying 29:
Trying 17: spill 58(freq=2000)
Trying 16:
Trying 15:
Trying 14:
Trying 13:
Trying 12:
Trying 11:
Trying 10:
Trying 9:
Trying 8:
Trying 7:
Trying 6:
Trying 5:
Trying 4:
Trying 3:
Trying 2:
2nd iter for reload pseudo assignments:
Reload r54 assignment failure
Spill r49(hr=24, freq=2000)
Spill split r58(hr=18, freq=2000)
Spill split r59(hr=19, freq=2000)
Assigning to 58 (cl=SIMPLE_LD_REGS, orig=58, freq=2000, tfirst=58,
tfreq=2000)...
Assign 18 to split r58 (freq=2000)
Assigning to 59 (cl=SIMPLE_LD_REGS, orig=59, freq=2000, tfirst=59,
tfreq=2000)...
Assign 19 to split r59 (freq=2000)
Assigning to 54 (cl=GENERAL_REGS, orig=48, freq=2000, tfirst=54,
tfreq=2000)...
Trying 24:
Trying 25:
Trying 18: spill 58(freq=2000) spill 59(freq=2000)
Trying 19: spill 59(freq=2000)
Trying 20:
Trying 21:
Trying 22:
Trying 23:
Trying 30:
Trying 31:
Trying 26:
Trying 27:
Trying 28:
Trying 29:
Trying 17: spill 58(freq=2000)
Trying 16:
Trying 15:
Trying 14:
Trying 13:
Trying 12:
Trying 11:
Trying 10:
Trying 9:
Trying 8:
Trying 7:
Trying 6:
Trying 5:
Trying 4:
Trying 3:
Trying 2:
Reassigning non-reload pseudos
Assign 24 to r49 (freq=2000)
****** Splitting a hard reg after assignment #7: ******
********** Pseudo live ranges #8: **********
BB 2
Insn 10: point = 0, n_alt = 3
Insn 19: point = 0, n_alt = -1
Hard reg 22 is preferable by r58 with profit 1000
Insn 21: point = 1, n_alt = -1
Hard reg 23 is preferable by r59 with profit 1000
Insn 16: point = 2, n_alt = -2
Hard reg 24 is preferable by r53 with profit 1000
Insn 9: point = 3, n_alt = -1
Insn 20: point = 5, n_alt = -1
Hard reg 23 is preferable by r59 with profit 2000
Insn 18: point = 6, n_alt = -1
Hard reg 22 is preferable by r58 with profit 2000
Insn 17: point = 7, n_alt = -2
Hard reg 18 is preferable by r54 with profit 1000
Insn 8: point = 9, n_alt = 4
Insn 6: point = 9, n_alt = 4
Insn 14: point = 10, n_alt = -1
r48: [8..9]
r49: [4..10]
r53: [2..3]
r54: [4..7]
r55: [3..3]
r56: [3..3]
r57: [3..3]
r58: [0..6]
r59: [1..5]
Compressing live ranges: from 11 to 6 - 54%
Ranges after the compression:
r48: [4..5]
r49: [2..5]
r53: [0..1]
r54: [2..3]
r55: [1..1]
r56: [1..1]
r57: [1..1]
r58: [0..3]
r59: [0..3]
********** Assignment #8: **********
Assigning to 54 (cl=GENERAL_REGS, orig=48, freq=2000, tfirst=54,
tfreq=2000)...
Trying 24: spill 49(freq=2000)
Trying 25: spill 49(freq=2000)
Trying 18: spill 58(freq=2000) spill 59(freq=2000)
Trying 19: spill 59(freq=2000)
Trying 20:
Trying 21:
Trying 22:
Trying 23: spill 49(freq=2000)
Trying 30:
Trying 31:
Trying 26:
Trying 27:
Trying 28:
Trying 29:
Trying 17: spill 58(freq=2000)
Trying 16:
Trying 15:
Trying 14:
Trying 13:
Trying 12:
Trying 11:
Trying 10:
Trying 9:
Trying 8:
Trying 7:
Trying 6:
Trying 5:
Trying 4:
Trying 3:
Trying 2:
2nd iter for reload pseudo assignments:
Reload r54 assignment failure
Spill r49(hr=24, freq=2000)
Spill split r58(hr=18, freq=2000)
Spill split r59(hr=19, freq=2000)
Assigning to 58 (cl=SIMPLE_LD_REGS, orig=58, freq=2000, tfirst=58,
tfreq=2000)...
Assign 18 to split r58 (freq=2000)
Assigning to 59 (cl=SIMPLE_LD_REGS, orig=59, freq=2000, tfirst=59,
tfreq=2000)...
Assign 19 to split r59 (freq=2000)
Assigning to 54 (cl=GENERAL_REGS, orig=48, freq=2000, tfirst=54,
tfreq=2000)...
Trying 24:
Trying 25:
Trying 18: spill 58(freq=2000) spill 59(freq=2000)
Trying 19: spill 59(freq=2000)
Trying 20:
Trying 21:
Trying 22:
Trying 23:
Trying 30:
Trying 31:
Trying 26:
Trying 27:
Trying 28:
Trying 29:
Trying 17: spill 58(freq=2000)
Trying 16:
Trying 15:
Trying 14:
Trying 13:
Trying 12:
Trying 11:
Trying 10:
Trying 9:
Trying 8:
Trying 7:
Trying 6:
Trying 5:
Trying 4:
Trying 3:
Trying 2:
Reassigning non-reload pseudos
Assign 24 to r49 (freq=2000)
****** Splitting a hard reg after assignment #8: ******
********** Pseudo live ranges #9: **********
BB 2
Insn 10: point = 0, n_alt = 3
Insn 19: point = 0, n_alt = -1
Hard reg 22 is preferable by r58 with profit 1000
Insn 21: point = 1, n_alt = -1
Hard reg 23 is preferable by r59 with profit 1000
Insn 16: point = 2, n_alt = -2
Hard reg 24 is preferable by r53 with profit 1000
Insn 9: point = 3, n_alt = -1
Insn 20: point = 5, n_alt = -1
Hard reg 23 is preferable by r59 with profit 2000
Insn 18: point = 6, n_alt = -1
Hard reg 22 is preferable by r58 with profit 2000
Insn 17: point = 7, n_alt = -2
Hard reg 18 is preferable by r54 with profit 1000
Insn 8: point = 9, n_alt = 4
Insn 6: point = 9, n_alt = 4
Insn 14: point = 10, n_alt = -1
r48: [8..9]
r49: [4..10]
r53: [2..3]
r54: [4..7]
r55: [3..3]
r56: [3..3]
r57: [3..3]
r58: [0..6]
r59: [1..5]
Compressing live ranges: from 11 to 6 - 54%
Ranges after the compression:
r48: [4..5]
r49: [2..5]
r53: [0..1]
r54: [2..3]
r55: [1..1]
r56: [1..1]
r57: [1..1]
r58: [0..3]
r59: [0..3]
********** Assignment #9: **********
Assigning to 54 (cl=GENERAL_REGS, orig=48, freq=2000, tfirst=54,
tfreq=2000)...
Trying 24: spill 49(freq=2000)
Trying 25: spill 49(freq=2000)
Trying 18: spill 58(freq=2000) spill 59(freq=2000)
Trying 19: spill 59(freq=2000)
Trying 20:
Trying 21:
Trying 22:
Trying 23: spill 49(freq=2000)
Trying 30:
Trying 31:
Trying 26:
Trying 27:
Trying 28:
Trying 29:
Trying 17: spill 58(freq=2000)
Trying 16:
Trying 15:
Trying 14:
Trying 13:
Trying 12:
Trying 11:
Trying 10:
Trying 9:
Trying 8:
Trying 7:
Trying 6:
Trying 5:
Trying 4:
Trying 3:
Trying 2:
2nd iter for reload pseudo assignments:
Reload r54 assignment failure
Spill r49(hr=24, freq=2000)
Spill split r58(hr=18, freq=2000)
Spill split r59(hr=19, freq=2000)
Assigning to 58 (cl=SIMPLE_LD_REGS, orig=58, freq=2000, tfirst=58,
tfreq=2000)...
Assign 18 to split r58 (freq=2000)
Assigning to 59 (cl=SIMPLE_LD_REGS, orig=59, freq=2000, tfirst=59,
tfreq=2000)...
Assign 19 to split r59 (freq=2000)
Assigning to 54 (cl=GENERAL_REGS, orig=48, freq=2000, tfirst=54,
tfreq=2000)...
Trying 24:
Trying 25:
Trying 18: spill 58(freq=2000) spill 59(freq=2000)
Trying 19: spill 59(freq=2000)
Trying 20:
Trying 21:
Trying 22:
Trying 23:
Trying 30:
Trying 31:
Trying 26:
Trying 27:
Trying 28:
Trying 29:
Trying 17: spill 58(freq=2000)
Trying 16:
Trying 15:
Trying 14:
Trying 13:
Trying 12:
Trying 11:
Trying 10:
Trying 9:
Trying 8:
Trying 7:
Trying 6:
Trying 5:
Trying 4:
Trying 3:
Trying 2:
Reassigning non-reload pseudos
Assign 24 to r49 (freq=2000)
****** Splitting a hard reg after assignment #9: ******
********** Pseudo live ranges #10: **********
BB 2
Insn 10: point = 0, n_alt = 3
Insn 19: point = 0, n_alt = -1
Hard reg 22 is preferable by r58 with profit 1000
Insn 21: point = 1, n_alt = -1
Hard reg 23 is preferable by r59 with profit 1000
Insn 16: point = 2, n_alt = -2
Hard reg 24 is preferable by r53 with profit 1000
Insn 9: point = 3, n_alt = -1
Insn 20: point = 5, n_alt = -1
Hard reg 23 is preferable by r59 with profit 2000
Insn 18: point = 6, n_alt = -1
Hard reg 22 is preferable by r58 with profit 2000
Insn 17: point = 7, n_alt = -2
Hard reg 18 is preferable by r54 with profit 1000
Insn 8: point = 9, n_alt = 4
Insn 6: point = 9, n_alt = 4
Insn 14: point = 10, n_alt = -1
r48: [8..9]
r49: [4..10]
r53: [2..3]
r54: [4..7]
r55: [3..3]
r56: [3..3]
r57: [3..3]
r58: [0..6]
r59: [1..5]
Compressing live ranges: from 11 to 6 - 54%
Ranges after the compression:
r48: [4..5]
r49: [2..5]
r53: [0..1]
r54: [2..3]
r55: [1..1]
r56: [1..1]
r57: [1..1]
r58: [0..3]
r59: [0..3]
********** Assignment #10: **********
Assigning to 54 (cl=GENERAL_REGS, orig=48, freq=2000, tfirst=54,
tfreq=2000)...
Trying 24: spill 49(freq=2000)
Trying 25: spill 49(freq=2000)
Trying 18: spill 58(freq=2000) spill 59(freq=2000)
Trying 19: spill 59(freq=2000)
Trying 20:
Trying 21:
Trying 22:
Trying 23: spill 49(freq=2000)
Trying 30:
Trying 31:
Trying 26:
Trying 27:
Trying 28:
Trying 29:
Trying 17: spill 58(freq=2000)
Trying 16:
Trying 15:
Trying 14:
Trying 13:
Trying 12:
Trying 11:
Trying 10:
Trying 9:
Trying 8:
Trying 7:
Trying 6:
Trying 5:
Trying 4:
Trying 3:
Trying 2:
2nd iter for reload pseudo assignments:
Reload r54 assignment failure
Spill r49(hr=24, freq=2000)
Spill split r58(hr=18, freq=2000)
Spill split r59(hr=19, freq=2000)
Assigning to 58 (cl=SIMPLE_LD_REGS, orig=58, freq=2000, tfirst=58,
tfreq=2000)...
Assign 18 to split r58 (freq=2000)
Assigning to 59 (cl=SIMPLE_LD_REGS, orig=59, freq=2000, tfirst=59,
tfreq=2000)...
Assign 19 to split r59 (freq=2000)
Assigning to 54 (cl=GENERAL_REGS, orig=48, freq=2000, tfirst=54,
tfreq=2000)...
Trying 24:
Trying 25:
Trying 18: spill 58(freq=2000) spill 59(freq=2000)
Trying 19: spill 59(freq=2000)
Trying 20:
Trying 21:
Trying 22:
Trying 23:
Trying 30:
Trying 31:
Trying 26:
Trying 27:
Trying 28:
Trying 29:
Trying 17: spill 58(freq=2000)
Trying 16:
Trying 15:
Trying 14:
Trying 13:
Trying 12:
Trying 11:
Trying 10:
Trying 9:
Trying 8:
Trying 7:
Trying 6:
Trying 5:
Trying 4:
Trying 3:
Trying 2:
Reassigning non-reload pseudos
Assign 24 to r49 (freq=2000)
****** Splitting a hard reg after assignment #10: ******
********** Pseudo live ranges #11: **********
BB 2
Insn 10: point = 0, n_alt = 3
Insn 19: point = 0, n_alt = -1
Hard reg 22 is preferable by r58 with profit 1000
Insn 21: point = 1, n_alt = -1
Hard reg 23 is preferable by r59 with profit 1000
Insn 16: point = 2, n_alt = -2
Hard reg 24 is preferable by r53 with profit 1000
Insn 9: point = 3, n_alt = -1
Insn 20: point = 5, n_alt = -1
Hard reg 23 is preferable by r59 with profit 2000
Insn 18: point = 6, n_alt = -1
Hard reg 22 is preferable by r58 with profit 2000
Insn 17: point = 7, n_alt = -2
Hard reg 18 is preferable by r54 with profit 1000
Insn 8: point = 9, n_alt = 4
Insn 6: point = 9, n_alt = 4
Insn 14: point = 10, n_alt = -1
r48: [8..9]
r49: [4..10]
r53: [2..3]
r54: [4..7]
r55: [3..3]
r56: [3..3]
r57: [3..3]
r58: [0..6]
r59: [1..5]
Compressing live ranges: from 11 to 6 - 54%
Ranges after the compression:
r48: [4..5]
r49: [2..5]
r53: [0..1]
r54: [2..3]
r55: [1..1]
r56: [1..1]
r57: [1..1]
r58: [0..3]
r59: [0..3]
********** Assignment #11: **********
Assigning to 54 (cl=GENERAL_REGS, orig=48, freq=2000, tfirst=54,
tfreq=2000)...
Trying 24: spill 49(freq=2000)
Trying 25: spill 49(freq=2000)
Trying 18: spill 58(freq=2000) spill 59(freq=2000)
Trying 19: spill 59(freq=2000)
Trying 20:
Trying 21:
Trying 22:
Trying 23: spill 49(freq=2000)
Trying 30:
Trying 31:
Trying 26:
Trying 27:
Trying 28:
Trying 29:
Trying 17: spill 58(freq=2000)
Trying 16:
Trying 15:
Trying 14:
Trying 13:
Trying 12:
Trying 11:
Trying 10:
Trying 9:
Trying 8:
Trying 7:
Trying 6:
Trying 5:
Trying 4:
Trying 3:
Trying 2:
2nd iter for reload pseudo assignments:
Reload r54 assignment failure
Spill r49(hr=24, freq=2000)
Spill split r58(hr=18, freq=2000)
Spill split r59(hr=19, freq=2000)
Assigning to 58 (cl=SIMPLE_LD_REGS, orig=58, freq=2000, tfirst=58,
tfreq=2000)...
Assign 18 to split r58 (freq=2000)
Assigning to 59 (cl=SIMPLE_LD_REGS, orig=59, freq=2000, tfirst=59,
tfreq=2000)...
Assign 19 to split r59 (freq=2000)
Assigning to 54 (cl=GENERAL_REGS, orig=48, freq=2000, tfirst=54,
tfreq=2000)...
Trying 24:
Trying 25:
Trying 18: spill 58(freq=2000) spill 59(freq=2000)
Trying 19: spill 59(freq=2000)
Trying 20:
Trying 21:
Trying 22:
Trying 23:
Trying 30:
Trying 31:
Trying 26:
Trying 27:
Trying 28:
Trying 29:
Trying 17: spill 58(freq=2000)
Trying 16:
Trying 15:
Trying 14:
Trying 13:
Trying 12:
Trying 11:
Trying 10:
Trying 9:
Trying 8:
Trying 7:
Trying 6:
Trying 5:
Trying 4:
Trying 3:
Trying 2:
Reassigning non-reload pseudos
Assign 24 to r49 (freq=2000)
****** Splitting a hard reg after assignment #11: ******
********** Pseudo live ranges #12: **********
BB 2
Insn 10: point = 0, n_alt = 3
Insn 19: point = 0, n_alt = -1
Hard reg 22 is preferable by r58 with profit 1000
Insn 21: point = 1, n_alt = -1
Hard reg 23 is preferable by r59 with profit 1000
Insn 16: point = 2, n_alt = -2
Hard reg 24 is preferable by r53 with profit 1000
Insn 9: point = 3, n_alt = -1
Insn 20: point = 5, n_alt = -1
Hard reg 23 is preferable by r59 with profit 2000
Insn 18: point = 6, n_alt = -1
Hard reg 22 is preferable by r58 with profit 2000
Insn 17: point = 7, n_alt = -2
Hard reg 18 is preferable by r54 with profit 1000
Insn 8: point = 9, n_alt = 4
Insn 6: point = 9, n_alt = 4
Insn 14: point = 10, n_alt = -1
r48: [8..9]
r49: [4..10]
r53: [2..3]
r54: [4..7]
r55: [3..3]
r56: [3..3]
r57: [3..3]
r58: [0..6]
r59: [1..5]
Compressing live ranges: from 11 to 6 - 54%
Ranges after the compression:
r48: [4..5]
r49: [2..5]
r53: [0..1]
r54: [2..3]
r55: [1..1]
r56: [1..1]
r57: [1..1]
r58: [0..3]
r59: [0..3]
********** Assignment #12: **********
Assigning to 54 (cl=GENERAL_REGS, orig=48, freq=2000, tfirst=54,
tfreq=2000)...
Trying 24: spill 49(freq=2000)
Trying 25: spill 49(freq=2000)
Trying 18: spill 58(freq=2000) spill 59(freq=2000)
Trying 19: spill 59(freq=2000)
Trying 20:
Trying 21:
Trying 22:
Trying 23: spill 49(freq=2000)
Trying 30:
Trying 31:
Trying 26:
Trying 27:
Trying 28:
Trying 29:
Trying 17: spill 58(freq=2000)
Trying 16:
Trying 15:
Trying 14:
Trying 13:
Trying 12:
Trying 11:
Trying 10:
Trying 9:
Trying 8:
Trying 7:
Trying 6:
Trying 5:
Trying 4:
Trying 3:
Trying 2:
2nd iter for reload pseudo assignments:
Reload r54 assignment failure
Spill r49(hr=24, freq=2000)
Spill split r58(hr=18, freq=2000)
Spill split r59(hr=19, freq=2000)
Assigning to 58 (cl=SIMPLE_LD_REGS, orig=58, freq=2000, tfirst=58,
tfreq=2000)...
Assign 18 to split r58 (freq=2000)
Assigning to 59 (cl=SIMPLE_LD_REGS, orig=59, freq=2000, tfirst=59,
tfreq=2000)...
Assign 19 to split r59 (freq=2000)
Assigning to 54 (cl=GENERAL_REGS, orig=48, freq=2000, tfirst=54,
tfreq=2000)...
Trying 24:
Trying 25:
Trying 18: spill 58(freq=2000) spill 59(freq=2000)
Trying 19: spill 59(freq=2000)
Trying 20:
Trying 21:
Trying 22:
Trying 23:
Trying 30:
Trying 31:
Trying 26:
Trying 27:
Trying 28:
Trying 29:
Trying 17: spill 58(freq=2000)
Trying 16:
Trying 15:
Trying 14:
Trying 13:
Trying 12:
Trying 11:
Trying 10:
Trying 9:
Trying 8:
Trying 7:
Trying 6:
Trying 5:
Trying 4:
Trying 3:
Trying 2:
Reassigning non-reload pseudos
Assign 24 to r49 (freq=2000)
****** Splitting a hard reg after assignment #12: ******
********** Pseudo live ranges #13: **********
BB 2
Insn 10: point = 0, n_alt = 3
Insn 19: point = 0, n_alt = -1
Hard reg 22 is preferable by r58 with profit 1000
Insn 21: point = 1, n_alt = -1
Hard reg 23 is preferable by r59 with profit 1000
Insn 16: point = 2, n_alt = -2
Hard reg 24 is preferable by r53 with profit 1000
Insn 9: point = 3, n_alt = -1
Insn 20: point = 5, n_alt = -1
Hard reg 23 is preferable by r59 with profit 2000
Insn 18: point = 6, n_alt = -1
Hard reg 22 is preferable by r58 with profit 2000
Insn 17: point = 7, n_alt = -2
Hard reg 18 is preferable by r54 with profit 1000
Insn 8: point = 9, n_alt = 4
Insn 6: point = 9, n_alt = 4
Insn 14: point = 10, n_alt = -1
r48: [8..9]
r49: [4..10]
r53: [2..3]
r54: [4..7]
r55: [3..3]
r56: [3..3]
r57: [3..3]
r58: [0..6]
r59: [1..5]
Compressing live ranges: from 11 to 6 - 54%
Ranges after the compression:
r48: [4..5]
r49: [2..5]
r53: [0..1]
r54: [2..3]
r55: [1..1]
r56: [1..1]
r57: [1..1]
r58: [0..3]
r59: [0..3]
********** Assignment #13: **********
Assigning to 54 (cl=GENERAL_REGS, orig=48, freq=2000, tfirst=54,
tfreq=2000)...
Trying 24: spill 49(freq=2000)
Trying 25: spill 49(freq=2000)
Trying 18: spill 58(freq=2000) spill 59(freq=2000)
Trying 19: spill 59(freq=2000)
Trying 20:
Trying 21:
Trying 22:
Trying 23: spill 49(freq=2000)
Trying 30:
Trying 31:
Trying 26:
Trying 27:
Trying 28:
Trying 29:
Trying 17: spill 58(freq=2000)
Trying 16:
Trying 15:
Trying 14:
Trying 13:
Trying 12:
Trying 11:
Trying 10:
Trying 9:
Trying 8:
Trying 7:
Trying 6:
Trying 5:
Trying 4:
Trying 3:
Trying 2:
2nd iter for reload pseudo assignments:
Reload r54 assignment failure
Spill r49(hr=24, freq=2000)
Spill split r58(hr=18, freq=2000)
Spill split r59(hr=19, freq=2000)
Assigning to 58 (cl=SIMPLE_LD_REGS, orig=58, freq=2000, tfirst=58,
tfreq=2000)...
Assign 18 to split r58 (freq=2000)
Assigning to 59 (cl=SIMPLE_LD_REGS, orig=59, freq=2000, tfirst=59,
tfreq=2000)...
Assign 19 to split r59 (freq=2000)
Assigning to 54 (cl=GENERAL_REGS, orig=48, freq=2000, tfirst=54,
tfreq=2000)...
Trying 24:
Trying 25:
Trying 18: spill 58(freq=2000) spill 59(freq=2000)
Trying 19: spill 59(freq=2000)
Trying 20:
Trying 21:
Trying 22:
Trying 23:
Trying 30:
Trying 31:
Trying 26:
Trying 27:
Trying 28:
Trying 29:
Trying 17: spill 58(freq=2000)
Trying 16:
Trying 15:
Trying 14:
Trying 13:
Trying 12:
Trying 11:
Trying 10:
Trying 9:
Trying 8:
Trying 7:
Trying 6:
Trying 5:
Trying 4:
Trying 3:
Trying 2:
Reassigning non-reload pseudos
Assign 24 to r49 (freq=2000)
****** Splitting a hard reg after assignment #13: ******
********** Pseudo live ranges #14: **********
BB 2
Insn 10: point = 0, n_alt = 3
Insn 19: point = 0, n_alt = -1
Hard reg 22 is preferable by r58 with profit 1000
Insn 21: point = 1, n_alt = -1
Hard reg 23 is preferable by r59 with profit 1000
Insn 16: point = 2, n_alt = -2
Hard reg 24 is preferable by r53 with profit 1000
Insn 9: point = 3, n_alt = -1
Insn 20: point = 5, n_alt = -1
Hard reg 23 is preferable by r59 with profit 2000
Insn 18: point = 6, n_alt = -1
Hard reg 22 is preferable by r58 with profit 2000
Insn 17: point = 7, n_alt = -2
Hard reg 18 is preferable by r54 with profit 1000
Insn 8: point = 9, n_alt = 4
Insn 6: point = 9, n_alt = 4
Insn 14: point = 10, n_alt = -1
r48: [8..9]
r49: [4..10]
r53: [2..3]
r54: [4..7]
r55: [3..3]
r56: [3..3]
r57: [3..3]
r58: [0..6]
r59: [1..5]
Compressing live ranges: from 11 to 6 - 54%
Ranges after the compression:
r48: [4..5]
r49: [2..5]
r53: [0..1]
r54: [2..3]
r55: [1..1]
r56: [1..1]
r57: [1..1]
r58: [0..3]
r59: [0..3]
********** Assignment #14: **********
Assigning to 54 (cl=GENERAL_REGS, orig=48, freq=2000, tfirst=54,
tfreq=2000)...
Trying 24: spill 49(freq=2000)
Trying 25: spill 49(freq=2000)
Trying 18: spill 58(freq=2000) spill 59(freq=2000)
Trying 19: spill 59(freq=2000)
Trying 20:
Trying 21:
Trying 22:
Trying 23: spill 49(freq=2000)
Trying 30:
Trying 31:
Trying 26:
Trying 27:
Trying 28:
Trying 29:
Trying 17: spill 58(freq=2000)
Trying 16:
Trying 15:
Trying 14:
Trying 13:
Trying 12:
Trying 11:
Trying 10:
Trying 9:
Trying 8:
Trying 7:
Trying 6:
Trying 5:
Trying 4:
Trying 3:
Trying 2:
2nd iter for reload pseudo assignments:
Reload r54 assignment failure
Spill r49(hr=24, freq=2000)
Spill split r58(hr=18, freq=2000)
Spill split r59(hr=19, freq=2000)
Assigning to 58 (cl=SIMPLE_LD_REGS, orig=58, freq=2000, tfirst=58,
tfreq=2000)...
Assign 18 to split r58 (freq=2000)
Assigning to 59 (cl=SIMPLE_LD_REGS, orig=59, freq=2000, tfirst=59,
tfreq=2000)...
Assign 19 to split r59 (freq=2000)
Assigning to 54 (cl=GENERAL_REGS, orig=48, freq=2000, tfirst=54,
tfreq=2000)...
Trying 24:
Trying 25:
Trying 18: spill 58(freq=2000) spill 59(freq=2000)
Trying 19: spill 59(freq=2000)
Trying 20:
Trying 21:
Trying 22:
Trying 23:
Trying 30:
Trying 31:
Trying 26:
Trying 27:
Trying 28:
Trying 29:
Trying 17: spill 58(freq=2000)
Trying 16:
Trying 15:
Trying 14:
Trying 13:
Trying 12:
Trying 11:
Trying 10:
Trying 9:
Trying 8:
Trying 7:
Trying 6:
Trying 5:
Trying 4:
Trying 3:
Trying 2:
Reassigning non-reload pseudos
Assign 24 to r49 (freq=2000)
****** Splitting a hard reg after assignment #14: ******
EMERGENCY DUMP:
foo
Dataflow summary:
;; fully invalidated by EH 0 [r0] 1 [r1] 18 [r18] 19 [r19] 20 [r20] 21
[r21] 22 [r22] 23 [r23] 24 [r24] 25 [r25] 26 [r26] 27 [r27] 30 [r30] 31 [r31]
33 [__SP_H__] 35 [argH] 36 [cc]
;; hardware regs used 28 [r28] 32 [__SP_L__] 34 [argL]
;; regular block artificial uses 28 [r28] 32 [__SP_L__] 34 [argL]
;; eh block artificial uses 28 [r28] 32 [__SP_L__] 34 [argL]
;; entry block defs 8 [r8] 9 [r9] 10 [r10] 11 [r11] 12 [r12] 13 [r13] 14
[r14] 15 [r15] 16 [r16] 17 [r17] 18 [r18] 19 [r19] 20 [r20] 21 [r21] 22 [r22]
23 [r23] 24 [r24] 25 [r25] 28 [r28] 32 [__SP_L__] 34 [argL]
;; exit block uses 28 [r28] 32 [__SP_L__]
;; regs ever live 18 [r18] 19 [r19] 20 [r20] 21 [r21] 22 [r22] 23 [r23]
24 [r24] 25 [r25] 26 [r26] 27 [r27] 30 [r30] 32 [__SP_L__]
;; ref usage r0={1d} r1={1d} r8={1d} r9={1d} r10={1d} r11={1d} r12={1d}
r13={1d} r14={1d} r15={1d} r16={1d} r17={1d} r18={2d} r19={2d} r20={2d}
r21={2d} r22={3d,1u} r23={3d,1u} r24={3d,2u} r25={3d,2u} r26={1d} r27={1d}
r28={1d,2u} r30={1d} r31={1d} r32={1d,3u} r33={1d} r34={1d,1u} r35={1d}
r36={1d} r47={1d} r48={1d,2u} r49={1d,2u} r50={1d} r51={1d}
;; total ref usage 63{47d,16u,0e} in 11{10 regular + 1 call} insns.
(note 1 0 4 NOTE_INSN_DELETED)
;; basic block 2, loop depth 0, count 1073741824 (estimated locally, freq
1.0000), maybe hot
;; prev block 0, next block 1, flags: (REACHABLE, RTL, MODIFIED)
;; pred: ENTRY [always] count:1073741824 (estimated locally, freq
1.0000) (FALLTHRU)
;; bb 2 artificial_defs: { }
;; bb 2 artificial_uses: { u-1(28){ }u-1(32){ }u-1(34){ }}
;; lr in 24 [r24] 25 [r25] 28 [r28] 32 [__SP_L__] 34 [argL]
;; lr use 24 [r24] 25 [r25] 28 [r28] 32 [__SP_L__] 34 [argL]
;; lr def 0 [r0] 1 [r1] 18 [r18] 19 [r19] 20 [r20] 21 [r21] 22 [r22] 23
[r23] 24 [r24] 25 [r25] 26 [r26] 27 [r27] 30 [r30] 31 [r31] 33 [__SP_H__] 35
[argH] 36 [cc] 47 48 49 50 51
(note 4 1 14 2 [bb 2] NOTE_INSN_BASIC_BLOCK)
(insn 14 4 2 2 (set (reg:HI 49 [ k ])
(reg:HI 24 r24 [ k ])) "spill.c":4:1 128 {*movhi_split}
(expr_list:REG_DEAD (reg:HI 24 r24 [ k ])
(nil)))
(note 2 14 3 2 NOTE_INSN_DELETED)
(note 3 2 6 2 NOTE_INSN_FUNCTION_BEG)
(insn 6 3 7 2 (set (reg:HI 48)
(const_int 5 [0x5])) "spill.c":5:5 128 {*movhi_split}
(expr_list:REG_EQUIV (const_int 5 [0x5])
(nil)))
(note 7 6 8 2 NOTE_INSN_DELETED)
(insn 8 7 17 2 (set (reg:HI 22 r22)
(symbol_ref/f:HI ("*.LC0") [flags 0x2] <var_decl 0x7efdf6ba0d10
*.LC0>)) "spill.c":5:5 128 {*movhi_split}
(nil))
(insn 17 8 18 2 (set (reg:HI 54 [48])
(reg:HI 48)) "spill.c":5:5 128 {*movhi_split}
(expr_list:REG_DEAD (reg:HI 48)
(nil)))
(insn 18 17 20 2 (set (reg:QI 58)
(reg:QI 22 r22)) "spill.c":5:5 113 {movqi_insn_split}
(expr_list:REG_DEAD (reg:QI 22 r22)
(nil)))
(insn 20 18 9 2 (set (reg:QI 59)
(reg:QI 23 r23)) "spill.c":5:5 113 {movqi_insn_split}
(expr_list:REG_DEAD (reg:QI 23 r23)
(nil)))
(insn 9 20 16 2 (parallel [
(set (reg:HI 53)
(div:HI (reg:HI 49 [ k ])
(reg:HI 54 [48])))
(set (reg:HI 55 [47])
(mod:HI (reg:HI 49 [ k ])
(reg:HI 54 [48])))
(clobber (reg:HI 56 [50]))
(clobber (reg:QI 57 [51]))
]) "spill.c":5:5 588 {divmodhi4}
(expr_list:REG_UNUSED (reg:QI 57 [51])
(expr_list:REG_UNUSED (reg:HI 56 [50])
(expr_list:REG_UNUSED (reg:HI 55 [47])
(expr_list:REG_DEAD (reg:HI 54 [48])
(expr_list:REG_DEAD (reg:HI 49 [ k ])
(nil)))))))
(insn 16 9 21 2 (set (reg:HI 24 r24)
(reg:HI 53)) "spill.c":5:5 128 {*movhi_split}
(expr_list:REG_DEAD (reg:HI 53)
(nil)))
(insn 21 16 19 2 (set (reg:QI 23 r23)
(reg:QI 59)) "spill.c":5:5 113 {movqi_insn_split}
(expr_list:REG_DEAD (reg:QI 59)
(nil)))
(insn 19 21 10 2 (set (reg:QI 22 r22)
(reg:QI 58)) "spill.c":5:5 113 {movqi_insn_split}
(expr_list:REG_DEAD (reg:QI 58)
(nil)))
(call_insn/j 10 19 11 2 (parallel [
(call (mem:HI (symbol_ref:HI ("bar") [flags 0x41] <function_decl
0x7efdf6baa600 bar>) [0 bar S2 A8])
(const_int 0 [0]))
(use (const_int 1 [0x1]))
]) "spill.c":5:5 961 {call_insn}
(expr_list:REG_DEAD (reg:HI 24 r24)
(expr_list:REG_DEAD (reg:HI 22 r22)
(expr_list:REG_CALL_DECL (symbol_ref:HI ("bar") [flags 0x41]
<function_decl 0x7efdf6baa600 bar>)
(nil))))
(expr_list:HI (use (reg:HI 24 r24))
(expr_list:HI (use (reg:HI 22 r22))
(nil))))
;; succ: EXIT [always] count:1073741824 (estimated locally, freq
1.0000) (ABNORMAL,SIBCALL)
;; lr out 28 [r28] 32 [__SP_L__] 34 [argL]
(barrier 11 10 15)
(note 15 11 0 NOTE_INSN_DELETED)
