Sounds like named address spaces to me: https://gcc.gnu.org/onlinedocs/gcc/Named-Address-Spaces.html
Best, Martin Am Dienstag, dem 27.06.2023 um 14:26 +0200 schrieb Rafał Pietrak via Gcc: > Hello everybody, > > I'm not quite sure if this is correct mailbox for this suggestion (may > be "embedded" would be better), but let me present it first (and while > the examples is from ARM stm32 environment, the issue would equally > apply to i386 or even amd64). So: > > 1. Small MPU (like stm32f103) would normally have small amount of RAM, > and even somewhat larger variant do have its memory "partitioned/ > dedicated" to various subsystems (like CloseCoupledMemory, Ethernet > buffers, USB buffs, etc). > > 2. to address any location within those sections of that memory (or > their entire RAM) it would suffice to use 16-bit pointers. > > 3. still, declaring a pointer in GCC always allocate "natural" size of a > pointer in given architecture. In case of ARM stm32 it would be 32-bits. > > 4. programs using pointers do keep them around in structures. So > programs with heavy use of pointers have those structures like 2 times > larger then necessary .... if only pointers were 16-bit. And memory in > those devices is scarce. > > 5. the same thing applies to 64-bit world. Programs that don't require > huge memories but do use pointers excessively, MUST take up 64-bit for a > pointer no matter what. > > So I was wondering if it would be feasible for GCC to allow SEGMENT to > be declared as "small" (like 16-bit addressable in 32-bit CPU, or 32-bit > addressable in 64-bit CPU), and ANY pointer declared to reference > location within them would then be appropriately reduced. > > In ARM world, the use of such pointers would require the use of an > additional register (functionally being a "segment base address") to > allow for data access using instructions like: "LD Rx, [Ry, Rz]" - > meaning register index reference. Here Ry is the base of the SEGMENT in > question. Or if (like inside a loop) the structure "pointed to" by Rz > must be often used, just one operation "ADD Rz, Ry" will prep Rz for > subsequent "ordinary" offset operations like: "LD Ra, [Rz, #member]" ... > and reentering the loop by "LDH Rz, [Rz, #next]" does what's required by > "x = x->next". > > Not having any experience in compiler implementations I have no idea if > this is a big or a small change to compiler design. > > -R
