On Tue, 2005-05-10 at 17:32, Sami Khawam wrote: > Hi Gary, > > Thanks a lot for the tip. > > After debugging, the problem seem to be coming from 'emit_conditional_move' > which is called by 'expand_sdiv_pow2' when converting division-by-constants > into > shifting. > The problem is that the architecture I have does not support compare > operations: > It either has a conditional move or a conditional branch instructions (the > compare operation is part of these instructions). > > To make a conditional move, 'emit_conditional_move' generates a seperate > compare > and then a move insns, maybe hoping that these will be later combined into a > single instruction during the optimization steps. > > Would it be possible to tell this to emit_conditional_move so that it > generates > the cmove insn directely?
The Thumb instruction set on ARM uses cbranchsi4 with very similar constraints to those you have. It would really help if you could post a testcase so that we can analyse this in a scientific manner rather than guessing what the problem might be. R.
