On Fri, Dec 5, 2014 at 5:46 PM, Michael Meissner <meiss...@linux.vnet.ibm.com> wrote: > After my upper regs patches went in, I noticed that the gcc.dg/c11-atomic-2.c > test would fail on a power8 host that was running in little endian mode. This > particular test only fails if you are compiling this code with no > optimization, > and power8 selected as the cpu. Ultimately, it fails in reload when an array > index is way out of bounds. > > In looking at it, it is due to rs6000_emit_move creating two separate moves of > SUBREG's of TFmode to assign a constant during RTL generation. I fixed this > so > this 'optimization' is only done if DFmode values can only go in the > traditional registers. While I was at it, I optimized setting TFmode > variables > to 0.0L to use xxlxor rather than loading up 2 double words of memory. > > I have done bootstraps on big endian power7, big endian power8, and little > endian power8 with no regressions in the test suite. I also have built the > Spec 2006 test suite for power7. Can I install these patches? > > 2014-12-05 Michael Meissner <meiss...@linux.vnet.ibm.com> > > PR target/64204 > * config/rs6000/rs6000.c (rs6000_emit_move): Do not split TFmode > constant moves if -mupper-regs-df. > > * config/rs6000/rs6000.md (mov<mode>_64bit_dm): Optimize moving > 0.0L to TFmode. > (movtd_64bit_nodm): Likewise. > (mov<mode>_32bit, FMOVE128 case): Likewise.
Okay. Thanks, David
