Hi,
MPX runtime checks some feature bits in order to check MPX is fully supported.
Runtime does it by cpuid calls but there is a __builtin_cpu_supports which may
be used for that. Unfortunately currently it doesn't support required bits.
Will it be OK to add them for trunk?
Thanks,
Ilya
--
gcc/
2014-11-20 Ilya Enkovich <ilya.enkov...@intel.com>
* config/i386/cpuid.h (bit_MPX): New.
(bit_BNDREGS): New.
(bit_BNDCSR): New.
* config/i386/i386.c (processor_features): Add
F_XSAVE, F_OSXSAVE, F_MPX, F_BNDREGS, F_BNDCSR.
(isa_names_table): Likewise.
* doc/extend.texi (__builtin_cpu_supports): Add
xsave, osxsave, mpx, bndregs, bndcsr.
libgcc/
2014-11-20 Ilya Enkovich <ilya.enkov...@intel.com>
* config/i386/cpuinfo.c (processor_features): Add
FEATURE_XSAVE, FEATURE_OSXSAVE, FEATURE_MPX,
FEATURE_BNDREGS, FEATURE_BNDCSR.
(get_available_features): Likewise.
diff --git a/gcc/config/i386/cpuid.h b/gcc/config/i386/cpuid.h
index 133e356..f85cebb 100644
--- a/gcc/config/i386/cpuid.h
+++ b/gcc/config/i386/cpuid.h
@@ -72,6 +72,7 @@
#define bit_AVX2 (1 << 5)
#define bit_BMI2 (1 << 8)
#define bit_RTM (1 << 11)
+#define bit_MPX (1 << 14)
#define bit_AVX512F (1 << 16)
#define bit_AVX512DQ (1 << 17)
#define bit_RDSEED (1 << 18)
@@ -87,6 +88,10 @@
/* %ecx */
#define bit_PREFETCHWT1 (1 << 0)
+/* XFEATURE_ENABLED_MASK register bits (%eax == 13, %ecx == 0) */
+#define bit_BNDREGS (1 << 3)
+#define bit_BNDCSR (1 << 4)
+
/* Extended State Enumeration Sub-leaf (%eax == 13, %ecx == 1) */
#define bit_XSAVEOPT (1 << 0)
#define bit_XSAVEC (1 << 1)
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index 3166e03..bbf3ea3 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -35106,6 +35106,11 @@ fold_builtin_cpu (tree fndecl, tree *args)
F_FMA4,
F_XOP,
F_FMA,
+ F_XSAVE,
+ F_OSXSAVE,
+ F_MPX,
+ F_BNDREGS,
+ F_BNDCSR,
F_MAX
};
@@ -35194,7 +35199,12 @@ fold_builtin_cpu (tree fndecl, tree *args)
{"fma4", F_FMA4},
{"xop", F_XOP},
{"fma", F_FMA},
- {"avx2", F_AVX2}
+ {"avx2", F_AVX2},
+ {"xsave", F_XSAVE},
+ {"osxsave",F_OSXSAVE},
+ {"mpx", F_MPX},
+ {"bndregs",F_BNDREGS},
+ {"bndcsr", F_BNDCSR}
};
tree __processor_model_type = build_processor_model_struct ();
diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi
index d10a815..a06ed0c 100644
--- a/gcc/doc/extend.texi
+++ b/gcc/doc/extend.texi
@@ -11629,6 +11629,16 @@ SSE4.2 instructions.
AVX instructions.
@item avx2
AVX2 instructions.
+@item xsave
+XFEATURE_ENABLED_MASK register and XSAVE, XRSTOR, XSETBV, XGETBV instructions
+@item osxsave
+OS has enabled support for using XGETBV and XSETBV instructions
+@item mpx
+MPX instructions.
+@item bndregs
+Indicates bound register component of MPX state
+@item bndcsr
+Indicates bounds configuration and status component of MPX state
@end table
Here is an example:
diff --git a/libgcc/config/i386/cpuinfo.c b/libgcc/config/i386/cpuinfo.c
index 6ff7502..9e060b0 100644
--- a/libgcc/config/i386/cpuinfo.c
+++ b/libgcc/config/i386/cpuinfo.c
@@ -96,7 +96,12 @@ enum processor_features
FEATURE_SSE4_A,
FEATURE_FMA4,
FEATURE_XOP,
- FEATURE_FMA
+ FEATURE_FMA,
+ FEATURE_XSAVE,
+ FEATURE_OSXSAVE,
+ FEATURE_MPX,
+ FEATURE_BNDREGS,
+ FEATURE_BNDCSR
};
struct __processor_model
@@ -270,6 +275,10 @@ get_available_features (unsigned int ecx, unsigned int edx,
features |= (1 << FEATURE_AVX);
if (ecx & bit_FMA)
features |= (1 << FEATURE_FMA);
+ if (ecx & bit_XSAVE)
+ features |= (1 << FEATURE_XSAVE);
+ if (ecx & bit_OSXSAVE)
+ features |= (1 << FEATURE_OSXSAVE);
/* Get Advanced Features at level 7 (eax = 7, ecx = 0). */
if (max_cpuid_level >= 7)
@@ -278,6 +287,19 @@ get_available_features (unsigned int ecx, unsigned int edx,
__cpuid_count (7, 0, eax, ebx, ecx, edx);
if (ebx & bit_AVX2)
features |= (1 << FEATURE_AVX2);
+ if (ebx & bit_MPX)
+ features |= (1 << FEATURE_MPX);
+ }
+
+ /* Get Advanced Features at level 13 (eax = 13, ecx = 0). */
+ if (max_cpuid_level >= 13)
+ {
+ unsigned int eax, ebx, ecx, edx;
+ __cpuid_count (13, 0, eax, ebx, ecx, edx);
+ if (eax & bit_BNDREGS)
+ features |= (1 << FEATURE_BNDREGS);
+ if (eax & bit_BNDCSR)
+ features |= (1 << FEATURE_BNDCSR);
}
unsigned int ext_level;
