From dfad13379a3f0674587f84281e4218ced7f4011e Mon Sep 17 00:00:00 2001
From: Charles Baylis <charles.baylis@linaro.org>
Date: Tue, 11 Nov 2014 16:35:08 +0000
Subject: [PATCH] [Aarch64] Report inline site for SIMD builtins

<DATE>  Charles Baylis  <charles.baylis@linaro.org>

	* config/aarch64/aarch64-builtins.c (aarch64_simd_expand_args): Pass
	expression to aarch64_simd_lane_bounds.
	* config/aarch64/aarch64-protos.h (aarch64_simd_lane_bounds): Update
	prototype.
	* config/aarch64/aarch64.c (aarch64_simd_lane_bounds): Add exp
	parameter. Report calling function in error message if exp is non-NULL.

Change-Id: I55472cbb4c758b63579f4141ed9953f9424616b2
---
 gcc/config/aarch64/aarch64-builtins.c |  2 +-
 gcc/config/aarch64/aarch64-protos.h   |  2 +-
 gcc/config/aarch64/aarch64.c          | 10 ++++++++--
 3 files changed, 10 insertions(+), 4 deletions(-)

diff --git a/gcc/config/aarch64/aarch64-builtins.c b/gcc/config/aarch64/aarch64-builtins.c
index d822af9..1757d1c 100644
--- a/gcc/config/aarch64/aarch64-builtins.c
+++ b/gcc/config/aarch64/aarch64-builtins.c
@@ -910,7 +910,7 @@ aarch64_simd_expand_args (rtx target, int icode, int have_retval,
 	        {
 	          enum machine_mode vmode = mode[argc - 1];
 	          aarch64_simd_lane_bounds (op[argc],
-					    0, GET_MODE_NUNITS (vmode));
+					    0, GET_MODE_NUNITS (vmode), exp);
 	          /* Keep to GCC-vector-extension lane indices in the RTL.  */
 	          op[argc] = GEN_INT (ENDIAN_LANE_N (vmode, INTVAL (op[argc])));
 	        }
diff --git a/gcc/config/aarch64/aarch64-protos.h b/gcc/config/aarch64/aarch64-protos.h
index 470b9eb..45cc8ad 100644
--- a/gcc/config/aarch64/aarch64-protos.h
+++ b/gcc/config/aarch64/aarch64-protos.h
@@ -268,7 +268,7 @@ void aarch64_simd_emit_pair_result_insn (machine_mode,
 /* Expand builtins for SIMD intrinsics.  */
 rtx aarch64_simd_expand_builtin (int, tree, rtx);
 
-void aarch64_simd_lane_bounds (rtx, HOST_WIDE_INT, HOST_WIDE_INT);
+void aarch64_simd_lane_bounds (rtx, HOST_WIDE_INT, HOST_WIDE_INT, tree = NULL);
 
 void aarch64_split_128bit_move (rtx, rtx);
 
diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index 21a2cc1..758830c 100644
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -8143,14 +8143,20 @@ aarch64_simd_check_vect_par_cnst_half (rtx op, machine_mode mode,
 /* Bounds-check lanes.  Ensure OPERAND lies between LOW (inclusive) and
    HIGH (exclusive).  */
 void
-aarch64_simd_lane_bounds (rtx operand, HOST_WIDE_INT low, HOST_WIDE_INT high)
+aarch64_simd_lane_bounds (rtx operand, HOST_WIDE_INT low, HOST_WIDE_INT high,
+			  tree exp)
 {
   HOST_WIDE_INT lane;
   gcc_assert (CONST_INT_P (operand));
   lane = INTVAL (operand);
 
   if (lane < low || lane >= high)
-    error ("lane %ld out of range %ld - %ld", lane, low, high - 1);
+  {
+    if (exp)
+      error ("%Klane %ld out of range %ld - %ld", exp, lane, low, high - 1);
+    else
+      error ("lane %ld out of range %ld - %ld", lane, low, high - 1);
+  }
 }
 
 /* Emit code to place a AdvSIMD pair result in memory locations (with equal
-- 
1.9.1

