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On 11 November 2014 15:14, Charles Baylis <charles.bay...@linaro.org> wrote: > > > On 6 November 2014 10:19, Alan Lawrence <alan.lawre...@arm.com> wrote: >> >> This generates out-of-range errors at compile- (rather than assemble-)time >> for the vqdm*_lane intrinsics, and also provides a single place to do >> bigendian lane-swapping for all those intrinsics (and others to follow in >> later patches). This allows us to remove many define_expands that just do a >> range-check and endian-swap before outputting the RTL for a corresponding >> "_internal" insn. >> >> Changes to aarch64-simd.md are not as big as they look, they are highly >> repetitive, like the code they are removing! Testcases are also repetitive, >> as unfortunately dg-error doesn't care *how many* errors there were matching >> it's pattern, as long as at least 1, hence having to separate each into own >> file - the last "0" in the dg-error disables the line-number checking, as >> the line numbers in our error messages refer to lines within arm_neon.h >> rather than within the test case. (They do at least mention the user >> function containing the call to the intrinsic.) >> >> Ok for trunk? >> > > It looks like there are a few places where you have 8 spaces where a tab > ought to be. Other than that, it looks good to me (but I can't approve) > > I am looking making errors found in arm_neon.h a bit more user friendly, > which depends on checking bounds on constant int parameters as you've done > here. > > Do you plan to do similar changes for loads/stores/shifts, and also for the > ARM back-end? I can help out if you don't already have patches in > development. > > Charles
