On 10/27/2014 12:49 AM, Zhenqiang Chen wrote:
> +  {AARCH64_CC_Z, 0}, /* EQ, Z == 1.  */
> +  {0, AARCH64_CC_Z}, /* NE, Z == 0.  */
> +  {AARCH64_CC_C, 0}, /* CS, C == 1.  */
> +  {0, AARCH64_CC_C}, /* CC, C == 0.  */
> +  {0, 0}, /* MI, not supported*/
> +  {0, 0}, /* PL, not supported*/
> +  {0, 0}, /* VS, not supported*/
> +  {0, 0}, /* VC, not supported*/

Why not go ahead and fill out the table?  You know what needs to go in these
slots, after all.

> +  {AARCH64_CC_C, AARCH64_CC_Z}, /* HI, C ==1 && Z == 0.  */
> +  {AARCH64_CC_Z, AARCH64_CC_C}, /* LS, !(C == 1 && Z == 0).  */
> +  {AARCH64_CC_N | AARCH64_CC_V, AARCH64_CC_N}, /* GE, N == V.  */
> +  {AARCH64_CC_N, AARCH64_CC_N | AARCH64_CC_V}, /* LT, N != V.  */
> +  {AARCH64_CC_N | AARCH64_CC_V, AARCH64_CC_Z}, /* GT, Z == 0 && N == V.  */
> +  {AARCH64_CC_Z, AARCH64_CC_N | AARCH64_CC_V}, /* LE, !(Z == 0 && N == V).  
> */

Perhaps it's me, but does it make things clearer to reduce these?
That is, for the compound conditions, we need not make both sub-conditions be
false, only one of them.  E.g.

  {AARCH64_CC_C, 0}             /* HI, C ==1 && Z == 0.  */
  {0, AARCH64_CC_C}             /* LS, !(C ==1 && Z == 0) */
  {0, AARCH64_CC_V}             /* GE, N == V */
  {AARCH64_CC_V, 0}             /* LT, N != V */
  {0, AARCH64_CC_Z}             /* GT, Z == 0 && N == V */
  {AARCH64_CC_Z, 0}             /* LE, !(Z == 0 && N == V) */

At which point it becomes blindingly obvious that while we can't compress the
table with ~nczv, we can index it with reverse_comparison instead.

> +    case 'k':
> +      {
> +     int cond_code;
> +     rtx op0 = XEXP (x, 0);
> +     enum rtx_code mode_code;
> +     /* Print a condition (eq, ne, etc) of ccmp.  */
> +
> +     if (!COMPARISON_P (x) || !ccmp_cc_register (op0, GET_MODE (op0)))
> +       {
> +         output_operand_lossage ("invalid operand for '%%%c'", code);
> +         return;
> +       }
> +
> +     mode_code = aarch64_ccmp_mode_to_code (GET_MODE (op0));
> +     cond_code = aarch64_get_condition_code_1 (CCmode, mode_code);
> +     gcc_assert (cond_code >= 0);
> +     fputs (aarch64_condition_codes[cond_code], f);
> +      }

Is there a branch with all the patches applied?  I can't look back at the
modified aarch64_get_condition_code_1, but off-hand I can't think of why %m/%M
wouldn't work.  Surely

  aarch64_get_condition_code_1 (GET_MODE (op0), GET_CODE (x))

will yield the correct cond_code.  If it didn't, then surely branches wouldn't
work at all.

These are not some magic new kind of conditions; they're exactly the same.


r~

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