Hello,
This patch fixes kmov* insn generation
and adds memory alternative to `movqi_internal'
pattern
Reg-test included.
Bootstrapped.
AVX-512* tests on top of patch-set all pass
under simulator.
Is it ok for trunk?
gcc/
* config/i386/i386.md (movhi_internal): Always detect mskmov.
(movqi_internal): Fix target check.
gcc/testsuite/
* gcc.target/i386/avx512dq-kmovb-1.c: New.
--
Thanks, K
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 624a1c1..4c93616 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -2394,7 +2394,9 @@
}
}
[(set (attr "type")
- (cond [(match_test "optimize_function_for_size_p (cfun)")
+ (cond [(eq_attr "alternative" "4,5,6")
+ (const_string "mskmov")
+ (match_test "optimize_function_for_size_p (cfun)")
(const_string "imov")
(and (eq_attr "alternative" "0")
(ior (not (match_test "TARGET_PARTIAL_REG_STALL"))
@@ -2403,8 +2405,6 @@
(and (eq_attr "alternative" "1,2")
(match_operand:HI 1 "aligned_operand"))
(const_string "imov")
- (eq_attr "alternative" "4,5,6")
- (const_string "mskmov")
(and (match_test "TARGET_MOVX")
(eq_attr "alternative" "0,2"))
(const_string "imovx")
@@ -2440,9 +2440,9 @@
(define_insn "*movqi_internal"
[(set (match_operand:QI 0 "nonimmediate_operand"
- "=q,q ,q ,r,r ,?r,m ,k,k,r")
+ "=q,q ,q ,r,r ,?r,m ,k,k,r ,m,k")
(match_operand:QI 1 "general_operand"
- "q ,qn,qm,q,rn,qm,qn,r ,k,k"))]
+ "q ,qn,qm,q,rn,qm,qn,r ,k,k,k,m"))]
"!(MEM_P (operands[0]) && MEM_P (operands[1]))"
{
switch (get_attr_type (insn))
@@ -2454,12 +2454,16 @@
case TYPE_MSKMOV:
switch (which_alternative)
{
- case 7: return TARGET_AVX512BW ? "kmovb\t{%k1, %0|%0, %k1}"
+ case 7: return TARGET_AVX512DQ ? "kmovb\t{%k1, %0|%0, %k1}"
: "kmovw\t{%k1, %0|%0, %k1}";
- case 8: return TARGET_AVX512BW ? "kmovb\t{%1, %0|%0, %1}"
+ case 8: return TARGET_AVX512DQ ? "kmovb\t{%1, %0|%0, %1}"
: "kmovw\t{%1, %0|%0, %1}";
- case 9: return TARGET_AVX512BW ? "kmovb\t{%1, %k0|%k0, %1}"
+ case 9: return TARGET_AVX512DQ ? "kmovb\t{%1, %k0|%k0, %1}"
: "kmovw\t{%1, %k0|%k0, %1}";
+ case 10:
+ case 11:
+ gcc_assert (TARGET_AVX512DQ);
+ return "kmovb\t{%1, %0|%0, %1}";
default: gcc_unreachable ();
}
@@ -2470,8 +2474,13 @@
return "mov{b}\t{%1, %0|%0, %1}";
}
}
- [(set (attr "type")
- (cond [(and (eq_attr "alternative" "5")
+ [(set_attr "isa" "*,*,*,*,*,*,*,*,*,*,avx512dq,avx512dq")
+ (set (attr "type")
+ (cond [(eq_attr "alternative" "3,5")
+ (const_string "imovx")
+ (eq_attr "alternative" "7,8,9,10,11")
+ (const_string "mskmov")
+ (and (eq_attr "alternative" "5")
(not (match_operand:QI 1 "aligned_operand")))
(const_string "imovx")
(match_test "optimize_function_for_size_p (cfun)")
@@ -2480,10 +2489,6 @@
(ior (not (match_test "TARGET_PARTIAL_REG_STALL"))
(not (match_test "TARGET_QIMODE_MATH"))))
(const_string "imov")
- (eq_attr "alternative" "3,5")
- (const_string "imovx")
- (eq_attr "alternative" "7,8,9")
- (const_string "mskmov")
(and (match_test "TARGET_MOVX")
(eq_attr "alternative" "2"))
(const_string "imovx")
diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-kmovb-1.c
b/gcc/testsuite/gcc.target/i386/avx512dq-kmovb-1.c
new file mode 100644
index 0000000..c886b5f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512dq-kmovb-1.c
@@ -0,0 +1,14 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512dq -O2" } */
+/* { dg-final { scan-assembler "kmovb\[ \\t\]+\[^\n\]*%k\[1-7\]" } } */
+
+#include <immintrin.h>
+
+volatile __m512d x;
+volatile __mmask8 m;
+
+void extern
+avx512dq_test (void)
+{
+ x = _mm512_mask_add_pd (x, m, x, x);
+}
