On Tue, Oct 14, 2014 at 11:18:28AM +0400, Kirill Yukhin wrote:
> * config/i386/sse.md (define_mode_iterator VI_AVX2): Extend
> to support AVX-512BW.
> (define_mode_iterator VI124_AVX2_48_AVX512F): Remove.
> (define_expand "<plusminus_insn><mode>3"): Remove masking support.
> (define_insn "*<plusminus_insn><mode>3"): Ditto.
> (define_expand "<plusminus_insn><VI48_AVX512VL:mode>3_mask"): New.
> (define_expand "<plusminus_insn><VI12_AVX512VL:mode>3_mask"): Ditto.
> (define_insn "*<plusminus_insn><VI48_AVX512VL:mode>3_mask"): Ditto.
> (define_insn "*<plusminus_insn><VI12_AVX512VL:mode>3_mask"): Ditto.
> (define_expand "<sse2_avx2>_andnot<mode>3"): Remove masking support.
> (define_insn "*andnot<mode>3"): Ditto.
> (define_expand "<sse2_avx2>_andnot<VI48_AVX512VL:mode>3_mask"): New.
> (define_expand "<sse2_avx2>_andnot<VI12_AVX512VL:mode>3_mask"): Ditto.
> (define_insn "*andnot<VI48_AVX512VL:mode>3<mask_name>"): Ditto.
> (define_insn "*andnot<VI12_AVX512VL:mode>3<mask_name>"): Ditto.
> (define_insn "*abs<mode>2"): Remove masking support.
> (define_insn "abs<VI48_AVX512VL:mode>2_mask"): New.
> (define_insn "abs<VI12_AVX512VL:mode>2_mask"): Ditto.
> (define_expand "abs<mode>2"): Use VI_AVX2 mode iterator.
Unfortunately this caused PR63600. The problem is that VI_AVX2
mode iterator includes V2DI and for AVX2 also V4DI, but for pre-ssse3
ix86_expand_sse2_abs doesn't handle V2DI (and can't easily, we don't have
PSRAQ instruction), for ssse3 there is no vpabsq instruction, and for
avx2 neither.
We can handle V2DI/V4DI only for TARGET_AVX512VL, and V8DI for
TARGET_AVX512F.
Thus, IMHO the mode iterator on at least
(define_insn "*abs<mode>2"
and on
(define_expand "abs<mode>2"
is wrong, should not include V2DI/V4DI unless TARGET_AVX512VL
(so new (or ressurrected, was that VI124_AVX2_48_AVX512F?)
specialized mode iterator?).
Jakub
