When testing arm-linux-gnueabihf triple with configure options
--with-mode=thumb(that makes -mthumb option default).
some testcase is failed with error message "sorry, unimplemented:
Thumb-1 hard-float VFP ABI".
I found gcc compiler show this error message when :
1. -mthumb is used with -march=armv6 (or armv5e) and -mcpu=xscale
2. the test source have function body.
And when -mthumb is the default option of compiler, the dg-skip-if
functions can not detect it,
There is no xscale check function in target-supports.exp in. so we
need to add it .
And there are only macros in the test program in
check_effective_target_arm* function . no function body, we need to
add it too.
Here is my patch:
2014-10-08 Wangdeqiang <wangdeqi...@linaro.org>
* lib/target-supports.exp (check_effective_target_arm_
xscale_ok): New function.
(check_effective_target_arm_arch_FUNC_ok): Add test function body.
* gcc.target/arm/pr40887.c (dg-require-effective-target): add
arm_arch_v5te_ok check
* gcc.target/arm/scd42-1.c (dg-require-effective-target): add
arm_xscale_ok check
* gcc.target/arm/scd42-2.c : Likewise
* gcc.target/arm/scd42-3.c : Likewise
* gcc.target/arm/g2.c : Likewise
* gcc.target/arm/xor-and.c (dg-require-effective-target): add
arm_arch_v6_ok check
Index: gcc/testsuite/gcc.target/arm/pr40887.c
===================================================================
--- gcc/testsuite/gcc.target/arm/pr40887.c (revision 216115)
+++ gcc/testsuite/gcc.target/arm/pr40887.c (working copy)
@@ -1,6 +1,7 @@
/* { dg-skip-if "need at least armv5" { *-*-* } { "-march=armv[234]*"
} { "" } } */
/* { dg-options "-O2 -march=armv5te" } */
/* { dg-final { scan-assembler "blx" } } */
+/* { dg-require-effective-target arm_arch_v5te_ok } */
int (*indirect_func)(int x);
Index: gcc/testsuite/gcc.target/arm/scd42-2.c
===================================================================
--- gcc/testsuite/gcc.target/arm/scd42-2.c (revision 216115)
+++ gcc/testsuite/gcc.target/arm/scd42-2.c (working copy)
@@ -5,6 +5,7 @@
/* { dg-skip-if "Test is specific to the Xscale" { arm*-*-* } {
"-mcpu=*" } { "-mcpu=xscale" } } */
/* { dg-skip-if "Test is specific to ARM mode" { arm*-*-* } {
"-mthumb" } { "" } } */
/* { dg-require-effective-target arm32 } */
+/* { dg-require-effective-target arm_xscale_ok } */
unsigned load2(void) __attribute__ ((naked));
unsigned load2(void)
Index: gcc/testsuite/gcc.target/arm/scd42-3.c
===================================================================
--- gcc/testsuite/gcc.target/arm/scd42-3.c (revision 216115)
+++ gcc/testsuite/gcc.target/arm/scd42-3.c (working copy)
@@ -3,6 +3,7 @@
/* { dg-skip-if "Test is specific to Xscale" { arm*-*-* } {
"-march=*" } { "-march=xscale" } } */
/* { dg-skip-if "Test is specific to Xscale" { arm*-*-* } { "-mcpu=*"
} { "-mcpu=xscale" } } */
/* { dg-options "-mcpu=xscale -O" } */
+/* { dg-require-effective-target arm_xscale_ok } */
unsigned load4(void) __attribute__ ((naked));
unsigned load4(void)
Index: gcc/testsuite/gcc.target/arm/g2.c
===================================================================
--- gcc/testsuite/gcc.target/arm/g2.c (revision 216115)
+++ gcc/testsuite/gcc.target/arm/g2.c (working copy)
@@ -5,6 +5,7 @@
/* { dg-skip-if "Test is specific to the Xscale" { arm*-*-* } {
"-mcpu=*" } { "-mcpu=xscale" } } */
/* { dg-skip-if "Test is specific to ARM mode" { arm*-*-* } {
"-mthumb" } { "" } } */
/* { dg-require-effective-target arm32 } */
+/* { dg-require-effective-target arm_xscale_ok } */
/* Brett Gaines' test case. */
unsigned BCPL(unsigned) __attribute__ ((naked));
Index: gcc/testsuite/gcc.target/arm/xor-and.c
===================================================================
--- gcc/testsuite/gcc.target/arm/xor-and.c (revision 216115)
+++ gcc/testsuite/gcc.target/arm/xor-and.c (working copy)
@@ -1,6 +1,7 @@
/* { dg-do compile } */
/* { dg-options "-O -march=armv6" } */
/* { dg-prune-output "switch .* conflicts with" } */
+/* { dg-require-effective-target arm_arch_v6_ok } */
unsigned short foo (unsigned short x)
{
Index: gcc/testsuite/gcc.target/arm/scd42-1.c
===================================================================
--- gcc/testsuite/gcc.target/arm/scd42-1.c (revision 216115)
+++ gcc/testsuite/gcc.target/arm/scd42-1.c (working copy)
@@ -2,6 +2,7 @@
/* { dg-do compile } */
/* { dg-skip-if "incompatible options" { arm*-*-* } { "-march=*" } { "" } } */
/* { dg-options "-mcpu=xscale -O" } */
+/* { dg-require-effective-target arm_xscale_ok } */
unsigned load1(void) __attribute__ ((naked));
unsigned load1(void)
Index: gcc/testsuite/lib/target-supports.exp
===================================================================
--- gcc/testsuite/lib/target-supports.exp (revision 216115)
+++ gcc/testsuite/lib/target-supports.exp (working copy)
@@ -2721,6 +2721,11 @@ foreach { armfunc armflag armdef } { v4
#if !defined (DEF)
#error !DEF
#endif
+ int
+ main (void)
+ {
+ return 0;
+ }
} "FLAG" ]
}
@@ -2948,6 +2953,23 @@ proc check_effective_target_arm_hf_eabi
}]
}
+# Return 1 if this is an ARM target supporting -mcpu=xscale.
+# Some multilibs may be incompatible with this option.
+proc check_effective_target_arm_xscale_ok { } {
+ if { [check_effective_target_arm32] } {
+ return [check_no_compiler_messages arm_xscale_ok object {
+ int dummy;
+ int
+ main (void)
+ {
+ return 0;
+ }
+ } "-mcpu=xscale"]
+ } else {
+ return 0
+ }
+}
+
# Return 1 if this is an ARM target supporting -mcpu=iwmmxt.
# Some multilibs may be incompatible with this option.
