On certain patterns in atomics.md the constraint 'n' is used in
combination with the predicate atomic_op_operand. The constraint is too
general and allows constants that are disallowed by the predicate. This
causes an ICE In final_scan_insn when the insn cannot be split because
the constraint and predicate do not match.
Tested on aarch64-none-elf, aarch64-linux-gnu. Additionally the
originally reporter of the bug, (d...@ubuntu.com), applied the patch and
successfully bootstrapped and tested with no regressions.
2014-09-23 Michael Collison <michael.colli...@linaro.org>
* config/aarch64/iterators.md (lconst_atomic): New mode attribute to
support constraints for CONST_INT in atomic operations.
* config/aarch64/atomics.md
(atomic_<atomic_optab><mode>): Use lconst_atomic constraint.
(atomic_nand<mode>): Likewise.
(atomic_fetch_<atomic_optab><mode>): Likewise.
(atomic_fetch_nand<mode>): Likewise.
(atomic_<atomic_optab>_fetch<mode>): Likewise.
(atomic_nand_fetch<mode>): Likewise.
--
Michael Collison
Linaro Toolchain Working Group
michael.colli...@linaro.org
--- ../../../../linaro-gcc4_9_git/gcc/config/aarch64/iterators.md 2014-09-22 10:10:04.520258964 -0700
+++ iterators.md 2014-09-16 14:27:10.459050672 -0700
@@ -349,6 +349,9 @@
;; Attribute to describe constants acceptable in logical operations
(define_mode_attr lconst [(SI "K") (DI "L")])
+;; Attribute to describe constants acceptable in atomic logical operations
+(define_mode_attr lconst_atomic [(QI "K") (HI "K") (SI "K") (DI "L")])
+
;; Map a mode to a specific constraint character.
(define_mode_attr cmode [(QI "q") (HI "h") (SI "s") (DI "d")])
--- ../../../../linaro-gcc4_9_git/gcc/config/aarch64/atomics.md 2014-07-03 21:55:36.083476668 -0700
+++ atomics.md 2014-09-16 14:27:10.459050672 -0700
@@ -119,7 +119,7 @@
[(set (match_operand:ALLI 0 "aarch64_sync_memory_operand" "+Q")
(unspec_volatile:ALLI
[(atomic_op:ALLI (match_dup 0)
- (match_operand:ALLI 1 "<atomic_op_operand>" "rn"))
+ (match_operand:ALLI 1 "<atomic_op_operand>" "r<lconst_atomic>"))
(match_operand:SI 2 "const_int_operand")] ;; model
UNSPECV_ATOMIC_OP))
(clobber (reg:CC CC_REGNUM))
@@ -141,7 +141,7 @@
(unspec_volatile:ALLI
[(not:ALLI
(and:ALLI (match_dup 0)
- (match_operand:ALLI 1 "aarch64_logical_operand" "rn")))
+ (match_operand:ALLI 1 "aarch64_logical_operand" "r<lconst_atomic>")))
(match_operand:SI 2 "const_int_operand")] ;; model
UNSPECV_ATOMIC_OP))
(clobber (reg:CC CC_REGNUM))
@@ -164,7 +164,7 @@
(set (match_dup 1)
(unspec_volatile:ALLI
[(atomic_op:ALLI (match_dup 1)
- (match_operand:ALLI 2 "<atomic_op_operand>" "rn"))
+ (match_operand:ALLI 2 "<atomic_op_operand>" "r<lconst_atomic>"))
(match_operand:SI 3 "const_int_operand")] ;; model
UNSPECV_ATOMIC_OP))
(clobber (reg:CC CC_REGNUM))
@@ -188,7 +188,7 @@
(unspec_volatile:ALLI
[(not:ALLI
(and:ALLI (match_dup 1)
- (match_operand:ALLI 2 "aarch64_logical_operand" "rn")))
+ (match_operand:ALLI 2 "aarch64_logical_operand" "r<lconst_atomic>")))
(match_operand:SI 3 "const_int_operand")] ;; model
UNSPECV_ATOMIC_OP))
(clobber (reg:CC CC_REGNUM))
@@ -209,7 +209,7 @@
[(set (match_operand:ALLI 0 "register_operand" "=&r")
(atomic_op:ALLI
(match_operand:ALLI 1 "aarch64_sync_memory_operand" "+Q")
- (match_operand:ALLI 2 "<atomic_op_operand>" "rn")))
+ (match_operand:ALLI 2 "<atomic_op_operand>" "r<lconst_atomic>")))
(set (match_dup 1)
(unspec_volatile:ALLI
[(match_dup 1) (match_dup 2)
@@ -233,7 +233,7 @@
(not:ALLI
(and:ALLI
(match_operand:ALLI 1 "aarch64_sync_memory_operand" "+Q")
- (match_operand:ALLI 2 "aarch64_logical_operand" "rn"))))
+ (match_operand:ALLI 2 "aarch64_logical_operand" "r<lconst_atomic>"))))
(set (match_dup 1)
(unspec_volatile:ALLI
[(match_dup 1) (match_dup 2)
