On Tue, Sep 16, 2014 at 12:10 PM, Kirill Yukhin <[email protected]> wrote:
> Updated ChangeLog entry:
> gcc/
> * config/i386/i386.c
> (ix86_expand_vector_extract): Handle V32HI and V64QI modes.
> * config/i386/sse.md
> (define_mode_iterator VI48F_256): New.
> (define_mode_attr extract_type): Ditto.
> (define_mode_attr extract_suf): Ditto.
> (define_mode_iterator AVX512_VEC): Ditto.
> (define_expand
> "<extract_type>_vextract<shuffletype><extract_suf>_mask"): Use
> AVX512_VEC.
> (define_insn "avx512dq_vextract<shuffletype>64x2_1_maskm"): New.
> (define_insn
> "<mask_codefor>avx512dq_vextract<shuffletype>64x2_1<mask_name>"):
> Ditto.
> (define_mode_attr extract_type_2): Ditto.
> (define_mode_attr extract_suf_2): Ditto.
> (define_mode_iterator AVX512_VEC_2): Ditto.
> (define_expand
> "<extract_type_2>_vextract<shuffletype><extract_suf_2>_mask"): Use
> AVX512_VEC_2 mode iterator.
> (define_insn "vec_extract_hi_<mode>_maskm"): Ditto.
> (define_expand "avx512vl_vextractf128<mode>"): Ditto.
> (define_insn_and_split "vec_extract_lo_<mode>"): Delete.
> (define_insn "vec_extract_lo_<mode><mask_name>"): New.
> (define_split for V16FI mode): Ditto.
> (define_insn_and_split "vec_extract_lo_<mode>"): Delete.
> (define_insn "vec_extract_lo_<mode><mask_name>"): New.
> (define_split for VI8F_256 mode): Ditto.
> (define_insn "vec_extract_hi_<mode><mask_name>"): Add masking.
> (define_insn_and_split "vec_extract_lo_<mode>"): Delete.
> (define_insn "vec_extract_lo_<mode><mask_name>"): New.
> (define_split for VI4F_256 mode): Ditto.
> (define_insn "vec_extract_lo_<mode>_maskm"): Ditto.
> (define_insn "vec_extract_hi_<mode>_maskm"): Ditto.
> (define_insn "vec_extract_hi_<mode><mask_name>"): Add masking.
> (define_mode_iterator VEC_EXTRACT_MODE): Add V64QI and V32HI modes.
> (define_insn "vcvtph2ps<mask_name>"): Fix pattern condition.
> (define_insn "avx512f_vextract<shuffletype>32x4_1_maskm"): Ditto.
> (define_insn
> "<mask_codefor>avx512f_vextract<shuffletype>32x4_1<mask_name>"):
> Update `type' attribute, remove explicit `memory' attribute
> calculation.
>
> Is it ok for trunk?
OK with a small change below.
> +(define_insn "vec_extract_lo_<mode>_maskm"
> + [(set (match_operand:<ssehalfvecmode> 0 "memory_operand" "=m")
> + (vec_merge:<ssehalfvecmode>
> + (vec_select:<ssehalfvecmode>
> + (match_operand:VI4F_256 1 "register_operand" "v")
> + (parallel [(const_int 0) (const_int 1)
> + (const_int 2) (const_int 3)]))
> + (match_operand:<ssehalfvecmode> 2 "memory_operand" "0")
> + (match_operand:QI 3 "register_operand" "k")))]
> + "TARGET_AVX512VL && TARGET_AVX512F"
> + "vextract<shuffletype>32x4\t{$0x0, %1, %0%{3%}|%0%{%3%}, %1, 0x0}"
> + [(set_attr "type" "sselog")
> + (set_attr "length_immediate" "1")
> + (set_attr "prefix" "evex")
> + (set_attr "mode" "<sseinsnmode>")])
This pattern should probably match attributes (especially memory attr)
of vec_extract_hi_<mode>_maskm below.
> +(define_insn "vec_extract_hi_<mode>_maskm"
> + [(set (match_operand:<ssehalfvecmode> 0 "memory_operand" "=m")
> + (vec_merge:<ssehalfvecmode>
> + (vec_select:<ssehalfvecmode>
> + (match_operand:VI4F_256 1 "register_operand" "v")
> + (parallel [(const_int 4) (const_int 5)
> + (const_int 6) (const_int 7)]))
> + (match_operand:<ssehalfvecmode> 2 "memory_operand" "0")
> + (match_operand:<ssehalfvecmode> 3 "register_operand" "k")))]
> + "TARGET_AVX512F && TARGET_AVX512VL"
> +{
> + return "vextract<shuffletype>32x4\t{$0x1, %1, %0%{%3%}|%0%{%3%}, %1, 0x1}";
> +}
> + [(set_attr "type" "sselog")
> + (set_attr "prefix_extra" "1")
> + (set_attr "length_immediate" "1")
> + (set_attr "memory" "store")
> + (set_attr "prefix" "evex")
> + (set_attr "mode" "<sseinsnmode>")])
