On Mon, Sep 01, 2014 at 09:28:09PM -0600, Jeff Law wrote: > >Note that in this case we're talking about a hard register, not a pseudo. > I was referring to r84 in Bin's message, not the condition code > register. Unless I missed something it's set at the start of the > sequence to the value 0, then later to -ltu(flags,cc,0).
Bin said that the three-insn combination is refused because of the flags register, not r84. So either the four-insn combination should do those same checks, or we should allow it, or both. > There's no good reason I can see why we're reusing a pseudo like that. > I suspect that if we go back, fix whatever's creating that lame sequence > and simply reject combinations involving a pseudo set more than once it > won't affect code in any real way. If we wanted to be anal about it, > we'd put in some kind of debugging note and someone could do some wider > scale testing. All that, too :-) Although it all seems to work fine for two-insn and three-insn combinations. Segher
