On 08/14/14 07:16, Ilya Tocar wrote:
I've observed SPEC2006 failure on avx512-vlbwdq branch.
It was caused by hardreg_cprop. In maybe_mode_change it was
assumed, that all values of the same register class and same mode.
are ok. This is not the case for i386/avx512. We need to honor
HARD_REGNO_MODE_OK.
One could argue that having a class where some members are OK for being used
in a particular mode, but other members are not is the core issue here.
Can you describe a bit about why you've got a class of that nature?
Background on that would be useful.
AVX512 added new 16 xmm registers (xmm16-xmm31).
Those registers require evex encoding.
Only 512-bit wide versions of instructions have evex encoding with
avx512f, but all versions have it with avx512vl.
Most instructions have same macroized pattern for 128/256/512 vector
length. They all use constraint 'v', which corresponds to
class ALL_SSE_REGS (xmm0 - xmm31). To disallow e. g. xmm20 in
256-bit case (avx512f) and allow it only in avx512vl case we have
HARD_REGNO_MODE_OK checking for regno being evex-only and
disallowing it if mode is not 512-bit.
Generally this kind of thing has been handled by splitting the register
class into two classes. I strongly suspect there are numerous places
where we assume that two regs in the same class are interchangeable.
I realize that's going to require some work in the x86 machine
description, but I think that's going to be a much better approach and
save you work in the long run.
jeff
