Hi all,
The Cortex-A53 scheduler description is missing rules for insn types used by instructions
such as vrint*, vmaxnm, vminnm causing them to be assigned to the "nothing"
unit.
This patch causes such instructions to be treated the same way as other simple
FPU instructions.
Bootstrapped and tested on aarch64-linux and tested on arm-none-eabi as well.
Ok for trunk?
Thanks,
Kyrill
2014-08-22 Kyrylo Tkachov <kyrylo.tkac...@arm.com>
* config/arm/cortex-a53.md (cortex_a53_fpalu): Add f_rints, f_rintd,
f_minmaxs, f_minmaxd types.
commit 8f38a58ebb76ae8d63659d488b57a2e0bc9bbdcc
Author: Kyrylo Tkachov <kyrylo.tkac...@arm.com>
Date: Thu Jun 19 13:37:38 2014 +0100
[ARM/AArch64] Schedule ARMv8-A FPU insns on Cortex-A53
diff --git a/gcc/config/arm/cortex-a53.md b/gcc/config/arm/cortex-a53.md
index e342cb2..72262d7 100644
--- a/gcc/config/arm/cortex-a53.md
+++ b/gcc/config/arm/cortex-a53.md
@@ -216,7 +216,8 @@
(and (eq_attr "tune" "cortexa53")
(eq_attr "type" "ffariths, fadds, ffarithd, faddd, fmov, fmuls,\
f_cvt,f_cvtf2i,f_cvti2f,\
- fcmps, fcmpd, fcsel"))
+ fcmps, fcmpd, fcsel, f_rints, f_rintd, f_minmaxs,\
+ f_minmaxd"))
"cortex_a53_slot0+cortex_a53_fpadd_pipe")
(define_insn_reservation "cortex_a53_fconst" 2
