[PATCH][ARM] Delete f_sels, f_seld types, use fcsel instead

[Kyrill Tkachov]

Hi all,

During the great types rework this must have slipped through the cracks. 
We had two different types to describe the fcsel (A64) and vsel (A32) 
instructions: fcsel and f_sel[s,d].
In the A53 pipeline description we use fcsel, so the AArch32 version was 
presumably scheduled improperly
This patch removes the f_sel[s,d] (I don't think we need the granularity 
for any cores) types and gets the cmov pattern in arm.md to use the 
fcsel like the equivalent aarch64.md pattern.

Tested arm-none-eabi on an emulator.

Ok for trunk?

2014-08-07  Kyrylo Tkachov  <kyrylo.tkac...@arm.com>

    * config/arm/arm.md (*cmov<mode>): Set type attribute to fcsel.
    * config/arm/types.md (f_sels, f_seld): Delete.diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md
index 6ae240e..397da96 100644
--- a/gcc/config/arm/arm.md
+++ b/gcc/config/arm/arm.md
@@ -7416,7 +7416,7 @@
     return \"\";
   }"
   [(set_attr "conds" "use")
-   (set_attr "type" "f_sel<vfp_type>")]
+   (set_attr "type" "fcsel")]
 )
 
 (define_insn_and_split "*movsicc_insn"
diff --git a/gcc/config/arm/types.md b/gcc/config/arm/types.md
index efbf7a7..f4feb2d 100644
--- a/gcc/config/arm/types.md
+++ b/gcc/config/arm/types.md
@@ -66,7 +66,6 @@
 ; f_mrc              transfer vfp to arm reg.
 ; f_mrrc             transfer vfp to two arm regs.
 ; f_rint[d,s]        double/single floating point rount to integral.
-; f_sel[d,s]         double/single floating byte select.
 ; f_store[d,s]       double/single store to memory.  Used for VFP unit.
 ; fadd[d,s]          double/single floating-point scalar addition.
 ; fcmp[d,s]          double/single floating-point compare.
@@ -571,8 +570,6 @@
   f_mrrc,\
   f_rintd,\
   f_rints,\
-  f_seld,\
-  f_sels,\
   f_stored,\
   f_stores,\
   faddd,\