gcc/
* config/arm/arm-protos.h (arm_final_prescan_insn): Likewise for param.
(thumb1_final_prescan_insn): Likewise.
(thumb2_final_prescan_insn): Likewise.
* config/arm/arm.c (emit_set_insn): Strengthen return type from
rtx to rtx_insn *.
(struct minipool_node): Likewise for field "insn".
(dump_minipool): Likewise for param "scan".
(create_fix_barrier): Likewise for local "from". Strengthen local
"label" from rtx to rtx_code_label *.
(push_minipool_barrier): Strengthen param "insn" from rtx to
rtx_insn *.
(push_minipool_fix): Likewise.
(note_invalid_constants): Likewise.
(thumb2_reorg): Likewise for local "insn".
(arm_reorg): Likewise.
(thumb2_final_prescan_insn): Likewise for param
"insn" and local "first_insn".
(arm_final_prescan_insn): Likewise for param "insn" and locals
"start_insn", "this_insn".
(arm_debugger_arg_offset): Likewise for param "insn".
(thumb1_emit_multi_reg_push): Likewise for return type and local
"insn".
(thumb1_final_prescan_insn): Likewise for param "insn".
(thumb_far_jump_used_p): Likewise for local "insn".
(thumb1_expand_prologue): Likewise.
(arm_expand_epilogue_apcs_frame): Likewise.
(arm_expand_epilogue): Likewise for locals "insn", "tmp".
(arm_split_compare_and_swap): Strengthen locals "label1", "label2"
from rtx to rtx_code_label *.
(arm_split_atomic_op): Likewise for local "label".
(arm_emit_coreregs_64bit_shift): Likewise for local "done_label".
---
gcc/config/arm/arm-protos.h | 6 +--
gcc/config/arm/arm.c | 91 ++++++++++++++++++++++++---------------------
2 files changed, 51 insertions(+), 46 deletions(-)
diff --git a/gcc/config/arm/arm-protos.h b/gcc/config/arm/arm-protos.h
index 74645ee..a5a16fe 100644
--- a/gcc/config/arm/arm-protos.h
+++ b/gcc/config/arm/arm-protos.h
@@ -143,7 +143,7 @@ extern const char *arithmetic_instr (rtx, int);
extern void output_ascii_pseudo_op (FILE *, const unsigned char *, int);
extern const char *output_return_instruction (rtx, bool, bool, bool);
extern void arm_poke_function_name (FILE *, const char *);
-extern void arm_final_prescan_insn (rtx);
+extern void arm_final_prescan_insn (rtx_insn *);
extern int arm_debugger_arg_offset (int, rtx);
extern bool arm_is_long_call_p (tree);
extern int arm_emit_vector_const (FILE *, rtx);
@@ -184,8 +184,8 @@ extern int is_called_in_ARM_mode (tree);
extern int thumb_shiftable_const (unsigned HOST_WIDE_INT);
#ifdef RTX_CODE
extern enum arm_cond_code maybe_get_arm_condition_code (rtx);
-extern void thumb1_final_prescan_insn (rtx);
-extern void thumb2_final_prescan_insn (rtx);
+extern void thumb1_final_prescan_insn (rtx_insn *);
+extern void thumb2_final_prescan_insn (rtx_insn *);
extern const char *thumb_load_double_from_address (rtx *);
extern const char *thumb_output_move_mem_multiple (int, rtx *);
extern const char *thumb_call_via_reg (rtx);
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 6535d21..646c479 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -113,14 +113,14 @@ static Mnode *move_minipool_fix_backward_ref (Mnode *,
Mnode *, HOST_WIDE_INT);
static Mnode *add_minipool_backward_ref (Mfix *);
static void assign_minipool_offsets (Mfix *);
static void arm_print_value (FILE *, rtx);
-static void dump_minipool (rtx);
+static void dump_minipool (rtx_insn *);
static int arm_barrier_cost (rtx);
static Mfix *create_fix_barrier (Mfix *, HOST_WIDE_INT);
-static void push_minipool_barrier (rtx, HOST_WIDE_INT);
-static void push_minipool_fix (rtx, HOST_WIDE_INT, rtx *, enum machine_mode,
- rtx);
+static void push_minipool_barrier (rtx_insn *, HOST_WIDE_INT);
+static void push_minipool_fix (rtx_insn *, HOST_WIDE_INT, rtx *,
+ enum machine_mode, rtx);
static void arm_reorg (void);
-static void note_invalid_constants (rtx, HOST_WIDE_INT, int);
+static void note_invalid_constants (rtx_insn *, HOST_WIDE_INT, int);
static unsigned long arm_compute_save_reg0_reg12_mask (void);
static unsigned long arm_compute_save_reg_mask (void);
static unsigned long arm_isr_value (tree);
@@ -178,7 +178,7 @@ static rtx arm_expand_unop_builtin (enum insn_code, tree,
rtx, int);
static rtx arm_expand_builtin (tree, rtx, rtx, enum machine_mode, int);
static tree arm_builtin_decl (unsigned, bool);
static void emit_constant_insn (rtx cond, rtx pattern);
-static rtx emit_set_insn (rtx, rtx);
+static rtx_insn *emit_set_insn (rtx, rtx);
static rtx emit_multi_reg_push (unsigned long, unsigned long);
static int arm_arg_partial_bytes (cumulative_args_t, enum machine_mode,
tree, bool);
@@ -1966,7 +1966,7 @@ arm_constant_limit (bool size_p)
/* Emit an insn that's a simple single-set. Both the operands must be known
to be valid. */
-inline static rtx
+inline static rtx_insn *
emit_set_insn (rtx x, rtx y)
{
return emit_insn (gen_rtx_SET (VOIDmode, x, y));
@@ -15977,7 +15977,7 @@ struct minipool_node
struct minipool_fixup
{
Mfix * next;
- rtx insn;
+ rtx_insn * insn;
HOST_WIDE_INT address;
rtx * loc;
enum machine_mode mode;
@@ -16457,7 +16457,7 @@ assign_minipool_offsets (Mfix *barrier)
/* Output the literal table */
static void
-dump_minipool (rtx scan)
+dump_minipool (rtx_insn *scan)
{
Mnode * mp;
Mnode * nmp;
@@ -16580,8 +16580,8 @@ static Mfix *
create_fix_barrier (Mfix *fix, HOST_WIDE_INT max_address)
{
HOST_WIDE_INT count = 0;
- rtx barrier;
- rtx from = fix->insn;
+ rtx_barrier *barrier;
+ rtx_insn *from = fix->insn;
/* The instruction after which we will insert the jump. */
rtx selected = NULL;
int selected_cost;
@@ -16589,7 +16589,7 @@ create_fix_barrier (Mfix *fix, HOST_WIDE_INT
max_address)
HOST_WIDE_INT selected_address;
Mfix * new_fix;
HOST_WIDE_INT max_count = max_address - fix->address;
- rtx label = gen_label_rtx ();
+ rtx_code_label *label = gen_label_rtx ();
selected_cost = arm_barrier_cost (from);
selected_address = fix->address;
@@ -16678,7 +16678,7 @@ create_fix_barrier (Mfix *fix, HOST_WIDE_INT
max_address)
/* Record that there is a natural barrier in the insn stream at
ADDRESS. */
static void
-push_minipool_barrier (rtx insn, HOST_WIDE_INT address)
+push_minipool_barrier (rtx_insn *insn, HOST_WIDE_INT address)
{
Mfix * fix = (Mfix *) obstack_alloc (&minipool_obstack, sizeof (* fix));
@@ -16700,7 +16700,7 @@ push_minipool_barrier (rtx insn, HOST_WIDE_INT address)
fixing; VALUE is the constant that must be loaded, which is of type
MODE. */
static void
-push_minipool_fix (rtx insn, HOST_WIDE_INT address, rtx *loc,
+push_minipool_fix (rtx_insn *insn, HOST_WIDE_INT address, rtx *loc,
enum machine_mode mode, rtx value)
{
Mfix * fix = (Mfix *) obstack_alloc (&minipool_obstack, sizeof (* fix));
@@ -16856,7 +16856,7 @@ arm_const_double_by_immediates (rtx val)
If DO_PUSHES is false we do not actually push any of the fixups
needed. */
static void
-note_invalid_constants (rtx insn, HOST_WIDE_INT address, int do_pushes)
+note_invalid_constants (rtx_insn *insn, HOST_WIDE_INT address, int do_pushes)
{
int opno;
@@ -17014,7 +17014,7 @@ thumb2_reorg (void)
&& optimize_bb_for_speed_p (bb))
continue;
- rtx insn;
+ rtx_insn *insn;
Convert_Action action = SKIP;
Convert_Action action_for_partial_flag_setting
= (current_tune->disparage_partial_flag_setting_t16_encodings
@@ -17208,7 +17208,7 @@ thumb2_reorg (void)
static void
arm_reorg (void)
{
- rtx insn;
+ rtx_insn *insn;
HOST_WIDE_INT address = 0;
Mfix * fix;
@@ -22417,9 +22417,9 @@ get_arm_condition_code (rtx comparison)
/* Tell arm_asm_output_opcode to output IT blocks for conditionally executed
instructions. */
void
-thumb2_final_prescan_insn (rtx insn)
+thumb2_final_prescan_insn (rtx_insn *insn)
{
- rtx first_insn = insn;
+ rtx_insn *first_insn = insn;
rtx body = PATTERN (insn);
rtx predicate;
enum arm_cond_code code;
@@ -22501,7 +22501,7 @@ thumb2_final_prescan_insn (rtx insn)
}
void
-arm_final_prescan_insn (rtx insn)
+arm_final_prescan_insn (rtx_insn *insn)
{
/* BODY will hold the body of INSN. */
rtx body = PATTERN (insn);
@@ -22516,7 +22516,7 @@ arm_final_prescan_insn (rtx insn)
/* START_INSN will hold the insn from where we start looking. This is the
first insn after the following code_label if REVERSE is true. */
- rtx start_insn = insn;
+ rtx_insn *start_insn = insn;
/* If in state 4, check if the target branch is reached, in order to
change back to state 0. */
@@ -22588,7 +22588,8 @@ arm_final_prescan_insn (rtx insn)
int fail = FALSE, succeed = FALSE;
/* Flag which part of the IF_THEN_ELSE is the LABEL_REF. */
int then_not_else = TRUE;
- rtx this_insn = start_insn, label = 0;
+ rtx_insn *this_insn = start_insn;
+ rtx label = 0;
/* Register the insn jumped to. */
if (reverse)
@@ -22959,7 +22960,7 @@ arm_regno_class (int regno)
int
arm_debugger_arg_offset (int value, rtx addr)
{
- rtx insn;
+ rtx_insn *insn;
/* We are only interested if dbxout_parms() failed to compute the offset. */
if (value != 0)
@@ -25947,11 +25948,12 @@ number_of_first_bit_set (unsigned mask)
to be saved; REAL_REGS is the set of registers to be described as
saved. If REAL_REGS is 0, only describe the stack adjustment. */
-static rtx
+static rtx_insn *
thumb1_emit_multi_reg_push (unsigned long mask, unsigned long real_regs)
{
unsigned long regno;
- rtx par[10], tmp, reg, insn;
+ rtx par[10], tmp, reg;
+ rtx_insn *insn;
int i, j;
/* Build the parallel of the registers actually being stored. */
@@ -26347,7 +26349,7 @@ thumb_exit (FILE *f, int reg_containing_return_addr)
For Thumb-1, we track the status of the condition codes; this
information is used in the cbranchsi4_insn pattern. */
void
-thumb1_final_prescan_insn (rtx insn)
+thumb1_final_prescan_insn (rtx_insn *insn)
{
if (flag_print_asm_name)
asm_fprintf (asm_out_file, "%@ 0x%04x\n",
@@ -26416,7 +26418,7 @@ thumb_shiftable_const (unsigned HOST_WIDE_INT val)
static int
thumb_far_jump_used_p (void)
{
- rtx insn;
+ rtx_insn *insn;
bool far_jump = false;
unsigned int func_size = 0;
@@ -26865,7 +26867,7 @@ thumb_compute_initial_elimination_offset (unsigned int
from, unsigned int to)
void
thumb1_expand_prologue (void)
{
- rtx insn;
+ rtx_insn *insn;
HOST_WIDE_INT amount;
arm_stack_offsets *offsets;
@@ -27317,7 +27319,7 @@ arm_expand_epilogue_apcs_frame (bool really_return)
int saved_size = arm_get_vfp_saved_size ();
if (saved_size > 0)
{
- rtx insn;
+ rtx_insn *insn;
floats_from_frame += saved_size;
insn = emit_insn (gen_addsi3 (ip_rtx,
hard_frame_pointer_rtx,
@@ -27356,7 +27358,7 @@ arm_expand_epilogue_apcs_frame (bool really_return)
{
/* The frame pointer is guaranteed to be non-double-word aligned, as
it is set to double-word-aligned old_stack_pointer - 4. */
- rtx insn;
+ rtx_insn *insn;
int lrm_count = (num_regs % 2) ? (num_regs + 2) : (num_regs + 1);
for (i = LAST_IWMMXT_REGNUM; i >= FIRST_IWMMXT_REGNUM; i--)
@@ -27396,7 +27398,7 @@ arm_expand_epilogue_apcs_frame (bool really_return)
num_regs = bit_count (saved_regs_mask);
if ((offsets->outgoing_args != (1 + num_regs)) || cfun->calls_alloca)
{
- rtx insn;
+ rtx_insn *insn;
emit_insn (gen_blockage ());
/* Unwind the stack to just below the saved registers. */
insn = emit_insn (gen_addsi3 (stack_pointer_rtx,
@@ -27413,7 +27415,7 @@ arm_expand_epilogue_apcs_frame (bool really_return)
{
/* Interrupt handlers will have pushed the
IP onto the stack, so restore it now. */
- rtx insn;
+ rtx_insn *insn;
rtx addr = gen_rtx_MEM (SImode,
gen_rtx_POST_INC (SImode,
stack_pointer_rtx));
@@ -27482,7 +27484,7 @@ arm_expand_epilogue (bool really_return)
if (frame_pointer_needed)
{
- rtx insn;
+ rtx_insn *insn;
/* Restore stack pointer if necessary. */
if (TARGET_ARM)
{
@@ -27539,7 +27541,7 @@ arm_expand_epilogue (bool really_return)
amount = offsets->outgoing_args - offsets->saved_regs;
if (amount)
{
- rtx tmp;
+ rtx_insn *tmp;
/* Force out any pending memory operations that reference stacked
data
before stack de-allocation occurs. */
emit_insn (gen_blockage ());
@@ -27591,7 +27593,7 @@ arm_expand_epilogue (bool really_return)
for (i = FIRST_IWMMXT_REGNUM; i <= LAST_IWMMXT_REGNUM; i++)
if (df_regs_ever_live_p (i) && !call_used_regs[i])
{
- rtx insn;
+ rtx_insn *insn;
rtx addr = gen_rtx_MEM (V2SImode,
gen_rtx_POST_INC (SImode,
stack_pointer_rtx));
@@ -27680,9 +27682,10 @@ arm_expand_epilogue (bool really_return)
{
int i, j;
rtx dwarf = NULL_RTX;
- rtx tmp = emit_insn (gen_addsi3 (stack_pointer_rtx,
- stack_pointer_rtx,
- GEN_INT (crtl->args.pretend_args_size)));
+ rtx_insn *tmp =
+ emit_insn (gen_addsi3 (stack_pointer_rtx,
+ stack_pointer_rtx,
+ GEN_INT (crtl->args.pretend_args_size)));
RTX_FRAME_RELATED_P (tmp) = 1;
@@ -30234,7 +30237,8 @@ arm_split_compare_and_swap (rtx operands[])
enum machine_mode mode;
enum memmodel mod_s, mod_f;
bool is_weak;
- rtx label1, label2, x, cond;
+ rtx_code_label *label1, *label2;
+ rtx x, cond;
rval = operands[0];
mem = operands[1];
@@ -30260,7 +30264,7 @@ arm_split_compare_and_swap (rtx operands[])
if (!(use_acquire || use_release))
arm_pre_atomic_barrier (mod_s);
- label1 = NULL_RTX;
+ label1 = NULL;
if (!is_weak)
{
label1 = gen_label_rtx ();
@@ -30310,7 +30314,8 @@ arm_split_atomic_op (enum rtx_code code, rtx old_out,
rtx new_out, rtx mem,
enum memmodel model = (enum memmodel) INTVAL (model_rtx);
enum machine_mode mode = GET_MODE (mem);
enum machine_mode wmode = (mode == DImode ? DImode : SImode);
- rtx label, x;
+ rtx_code_label *label;
+ rtx x;
bool use_acquire = TARGET_HAVE_LDACQ
&& !(model == MEMMODEL_RELAXED
@@ -31236,7 +31241,7 @@ arm_emit_coreregs_64bit_shift (enum rtx_code code, rtx
out, rtx in,
ORR (SHIFT (ASHIFT, in_up, scratch1), out_down)));
if (code == ASHIFTRT)
{
- rtx done_label = gen_label_rtx ();
+ rtx_code_label *done_label = gen_label_rtx ();
emit_jump_insn (BRANCH (LT, done_label));
emit_insn (SET (out_down, ORR (SHIFT (ASHIFTRT, in_up, scratch2),
out_down)));
@@ -31255,7 +31260,7 @@ arm_emit_coreregs_64bit_shift (enum rtx_code code, rtx
out, rtx in,
if (code == ASHIFTRT)
{
- rtx done_label = gen_label_rtx ();
+ rtx_code_label *done_label = gen_label_rtx ();
emit_jump_insn (BRANCH (LT, done_label));
emit_insn (SET (scratch2, SHIFT (ASHIFTRT, in_up, scratch2)));
emit_insn (SET (out_down, ORR (out_down, scratch2)));
--
1.8.5.3
