gcc/
* config/bfin/bfin-protos.h (asm_conditional_branch): Strengthen
param 1 from rtx to rtx_insn *.
* config/bfin/bfin.c (expand_prologue_reg_save): Likewise for
the various locals named "insn".
(expand_epilogue_reg_restore): Likewise.
(frame_related_constant_load): Likewise.
(add_to_reg): Likewise.
(emit_link_insn): Likewise.
(do_link): Likewise.
(expand_interrupt_handler_prologue): Likewise.
(branch_dest): Likewise for param "branch".
(asm_conditional_branch): Likewise for param "insn".
(gen_one_bundle): Likewise for elements of param "slot" and local
"t".
(bfin_gen_bundles): Likewise for locals "insn", "next" and
elements of local "slot".
(reorder_var_tracking_notes): Likewise for locals "insn", "next",
"queue", "next_queue", "prev".
(workaround_rts_anomaly): Likewise for locals "insn", "first_insn".
(add_sched_insns_for_speculation): Likewise for local "insn".
---
gcc/config/bfin/bfin-protos.h | 2 +-
gcc/config/bfin/bfin.c | 56 ++++++++++++++++++++++---------------------
2 files changed, 30 insertions(+), 28 deletions(-)
diff --git a/gcc/config/bfin/bfin-protos.h b/gcc/config/bfin/bfin-protos.h
index be26ad1..f230a3a 100644
--- a/gcc/config/bfin/bfin-protos.h
+++ b/gcc/config/bfin/bfin-protos.h
@@ -97,7 +97,7 @@ extern void print_address_operand (FILE *, rtx);
extern void split_di (rtx [], int, rtx [], rtx []);
extern int split_load_immediate (rtx []);
extern void emit_pic_move (rtx *, enum machine_mode);
-extern void asm_conditional_branch (rtx, rtx *, int, int);
+extern void asm_conditional_branch (rtx_insn *, rtx *, int, int);
extern rtx bfin_gen_compare (rtx, enum machine_mode);
extern unsigned bfin_local_alignment (tree, unsigned);
diff --git a/gcc/config/bfin/bfin.c b/gcc/config/bfin/bfin.c
index 02bd4bd..fadfb5f 100644
--- a/gcc/config/bfin/bfin.c
+++ b/gcc/config/bfin/bfin.c
@@ -345,7 +345,7 @@ expand_prologue_reg_save (rtx spreg, int saveall, bool
is_inthandler)
if (saveall || is_inthandler)
{
- rtx insn = emit_move_insn (predec, gen_rtx_REG (SImode, REG_ASTAT));
+ rtx_insn *insn = emit_move_insn (predec, gen_rtx_REG (SImode,
REG_ASTAT));
RTX_FRAME_RELATED_P (insn) = 1;
for (dregno = REG_LT0; dregno <= REG_LB1; dregno++)
@@ -362,7 +362,7 @@ expand_prologue_reg_save (rtx spreg, int saveall, bool
is_inthandler)
if (total_consec != 0)
{
- rtx insn;
+ rtx_insn *insn;
rtx val = GEN_INT (-total_consec * 4);
rtx pat = gen_rtx_PARALLEL (VOIDmode, rtvec_alloc (total_consec + 2));
@@ -404,7 +404,8 @@ expand_prologue_reg_save (rtx spreg, int saveall, bool
is_inthandler)
{
if (must_save_p (is_inthandler, dregno))
{
- rtx insn = emit_move_insn (predec, gen_rtx_REG (word_mode, dregno));
+ rtx_insn *insn =
+ emit_move_insn (predec, gen_rtx_REG (word_mode, dregno));
RTX_FRAME_RELATED_P (insn) = 1;
ndregs--;
}
@@ -413,7 +414,8 @@ expand_prologue_reg_save (rtx spreg, int saveall, bool
is_inthandler)
{
if (must_save_p (is_inthandler, pregno))
{
- rtx insn = emit_move_insn (predec, gen_rtx_REG (word_mode, pregno));
+ rtx_insn *insn =
+ emit_move_insn (predec, gen_rtx_REG (word_mode, pregno));
RTX_FRAME_RELATED_P (insn) = 1;
npregs--;
}
@@ -424,7 +426,7 @@ expand_prologue_reg_save (rtx spreg, int saveall, bool
is_inthandler)
&& (df_regs_ever_live_p (i)
|| (!leaf_function_p () && call_used_regs[i]))))
{
- rtx insn;
+ rtx_insn *insn;
if (i == REG_A0 || i == REG_A1)
insn = emit_move_insn (gen_rtx_MEM (PDImode, predec1),
gen_rtx_REG (PDImode, i));
@@ -451,7 +453,7 @@ expand_epilogue_reg_restore (rtx spreg, bool saveall, bool
is_inthandler)
int npregs_consec = saveall ? 6 : n_pregs_to_save (is_inthandler, true);
int total_consec = ndregs_consec + npregs_consec;
int i, regno;
- rtx insn;
+ rtx_insn *insn;
/* A slightly crude technique to stop flow from trying to delete "dead"
insns. */
@@ -705,7 +707,7 @@ bfin_initial_elimination_offset (int from, int to)
static void
frame_related_constant_load (rtx reg, HOST_WIDE_INT constant, bool related)
{
- rtx insn;
+ rtx_insn *insn;
rtx cst = GEN_INT (constant);
if (constant >= -32768 && constant < 65536)
@@ -742,7 +744,7 @@ add_to_reg (rtx reg, HOST_WIDE_INT value, int frame, int
epilogue_p)
{
rtx tmpreg;
rtx tmpreg2;
- rtx insn;
+ rtx_insn *insn;
tmpreg2 = NULL_RTX;
@@ -791,7 +793,7 @@ add_to_reg (rtx reg, HOST_WIDE_INT value, int frame, int
epilogue_p)
do
{
int size = value;
- rtx insn;
+ rtx_insn *insn;
if (size > 60)
size = 60;
@@ -816,7 +818,7 @@ static void
emit_link_insn (rtx spreg, HOST_WIDE_INT frame_size)
{
HOST_WIDE_INT link_size = frame_size;
- rtx insn;
+ rtx_insn *insn;
int i;
if (link_size > 262140)
@@ -883,7 +885,7 @@ do_link (rtx spreg, HOST_WIDE_INT frame_size, bool all)
rtx pat = gen_movsi (gen_rtx_MEM (Pmode,
gen_rtx_PRE_DEC (Pmode, spreg)),
bfin_rets_rtx);
- rtx insn = emit_insn (pat);
+ rtx_insn *insn = emit_insn (pat);
RTX_FRAME_RELATED_P (insn) = 1;
}
if (must_save_fp_p ())
@@ -891,7 +893,7 @@ do_link (rtx spreg, HOST_WIDE_INT frame_size, bool all)
rtx pat = gen_movsi (gen_rtx_MEM (Pmode,
gen_rtx_PRE_DEC (Pmode, spreg)),
gen_rtx_REG (Pmode, REG_FP));
- rtx insn = emit_insn (pat);
+ rtx_insn *insn = emit_insn (pat);
RTX_FRAME_RELATED_P (insn) = 1;
}
add_to_reg (spreg, -frame_size, 1, 0);
@@ -939,7 +941,7 @@ expand_interrupt_handler_prologue (rtx spreg, e_funkind
fkind, bool all)
HOST_WIDE_INT frame_size = get_frame_size ();
rtx predec1 = gen_rtx_PRE_DEC (SImode, spreg);
rtx predec = gen_rtx_MEM (SImode, predec1);
- rtx insn;
+ rtx_insn *insn;
tree attrs = TYPE_ATTRIBUTES (TREE_TYPE (current_function_decl));
tree kspisusp = lookup_attribute ("kspisusp", attrs);
@@ -2415,7 +2417,7 @@ bfin_option_override (void)
we still prefer to use shorter sequences. */
static int
-branch_dest (rtx branch)
+branch_dest (rtx_insn *branch)
{
rtx dest;
int dest_uid;
@@ -2469,7 +2471,7 @@ static const char *ccbranch_templates[][3] = {
anyway. */
void
-asm_conditional_branch (rtx insn, rtx *operands, int n_nops, int predict_taken)
+asm_conditional_branch (rtx_insn *insn, rtx *operands, int n_nops, int
predict_taken)
{
int offset = branch_dest (insn) - INSN_ADDRESSES (INSN_UID (insn));
/* Note : offset for instructions like if cc jmp; jump.[sl] offset
@@ -3894,7 +3896,7 @@ bfin_reorg_loops (void)
/* Possibly generate a SEQUENCE out of three insns found in SLOT.
Returns true if we modified the insn chain, false otherwise. */
static bool
-gen_one_bundle (rtx slot[3])
+gen_one_bundle (rtx_insn *slot[3])
{
gcc_assert (slot[1] != NULL_RTX);
@@ -3916,7 +3918,7 @@ gen_one_bundle (rtx slot[3])
}
if (slot[2])
{
- rtx t = NEXT_INSN (slot[1]);
+ rtx_insn *t = NEXT_INSN (slot[1]);
while (t != slot[2])
{
if (! NOTE_P (t) || NOTE_KIND (t) != NOTE_INSN_DELETED)
@@ -3962,11 +3964,11 @@ bfin_gen_bundles (void)
basic_block bb;
FOR_EACH_BB_FN (bb, cfun)
{
- rtx insn, next;
- rtx slot[3];
+ rtx_insn *insn, *next;
+ rtx_insn *slot[3];
int n_filled = 0;
- slot[0] = slot[1] = slot[2] = NULL_RTX;
+ slot[0] = slot[1] = slot[2] = NULL;
for (insn = BB_HEAD (bb);; insn = next)
{
int at_end;
@@ -4022,7 +4024,7 @@ bfin_gen_bundles (void)
}
}
n_filled = 0;
- slot[0] = slot[1] = slot[2] = NULL_RTX;
+ slot[0] = slot[1] = slot[2] = NULL;
}
if (delete_this != NULL_RTX)
delete_insn (delete_this);
@@ -4041,8 +4043,8 @@ reorder_var_tracking_notes (void)
basic_block bb;
FOR_EACH_BB_FN (bb, cfun)
{
- rtx insn, next;
- rtx queue = NULL_RTX;
+ rtx_insn *insn, *next;
+ rtx_insn *queue = NULL;
bool in_bundle = false;
for (insn = BB_HEAD (bb); insn != BB_END (bb); insn = next)
@@ -4056,7 +4058,7 @@ reorder_var_tracking_notes (void)
{
while (queue)
{
- rtx next_queue = PREV_INSN (queue);
+ rtx_insn *next_queue = PREV_INSN (queue);
SET_PREV_INSN (NEXT_INSN (insn)) = queue;
SET_NEXT_INSN (queue) = NEXT_INSN (insn);
SET_NEXT_INSN (insn) = queue;
@@ -4072,7 +4074,7 @@ reorder_var_tracking_notes (void)
{
if (in_bundle)
{
- rtx prev = PREV_INSN (insn);
+ rtx_insn *prev = PREV_INSN (insn);
SET_PREV_INSN (next) = prev;
SET_NEXT_INSN (prev) = next;
@@ -4090,7 +4092,7 @@ reorder_var_tracking_notes (void)
static void
workaround_rts_anomaly (void)
{
- rtx insn, first_insn = NULL_RTX;
+ rtx_insn *insn, *first_insn = NULL;
int cycles = 4;
if (! ENABLE_WA_RETS)
@@ -4525,7 +4527,7 @@ workaround_speculation (void)
static void
add_sched_insns_for_speculation (void)
{
- rtx insn;
+ rtx_insn *insn;
if (! ENABLE_WA_SPECULATIVE_LOADS && ! ENABLE_WA_SPECULATIVE_SYNCS
&& ! ENABLE_WA_INDIRECT_CALLS)
--
1.8.5.3
