Hi all,
While working on another patch and looking at the rbit and clz patterns,
I noticed that in aarch32 the relevant patterns are not adjusted for
-mrestrict-it.
A program like:
int
foo (int a, int b)
{
if (a + 5 == b)
return __builtin_ctz (a);
return 1;
}
compiled with -march=armv8-a -mthumb could generate clz and rbit
instructions inside an IT block, thus earning an assembler warning.
Whilst there I also noticed that the output templates for the arm_rev
pattern have a %? that is used to print out condition codes during
predication but the pattern is not marked as predicable.
So I set the predicable attribute there and adjusted it for
-mrestrict-it while at it.
Ok for trunk?
2014-08-04 Kyrylo Tkachov <kyrylo.tkac...@arm.com>
* config/arm/arm.md (clzsi2): Set predicable_short_it attr to no.
(rbitsi2): Likewise.
(*arm_rev): Set predicable and predicable_short_it attributes.commit 1ea85f18ff46fa985ba79e6e64715ecf855751c3
Author: Kyrylo Tkachov <kyrylo.tkac...@arm.com>
Date: Wed Jul 9 16:38:45 2014 +0100
[ARM] Handle IT deprecation for clz, rbit, rev
diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md
index 916d552..3e1a1bb 100644
--- a/gcc/config/arm/arm.md
+++ b/gcc/config/arm/arm.md
@@ -10662,6 +10662,7 @@
"TARGET_32BIT && arm_arch5"
"clz%?\\t%0, %1"
[(set_attr "predicable" "yes")
+ (set_attr "predicable_short_it" "no")
(set_attr "type" "clz")])
(define_insn "rbitsi2"
@@ -10670,6 +10671,7 @@
"TARGET_32BIT && arm_arch_thumb2"
"rbit%?\\t%0, %1"
[(set_attr "predicable" "yes")
+ (set_attr "predicable_short_it" "no")
(set_attr "type" "clz")])
(define_expand "ctzsi2"
@@ -10829,6 +10831,8 @@
rev%?\t%0, %1"
[(set_attr "arch" "t1,t2,32")
(set_attr "length" "2,2,4")
+ (set_attr "predicable" "no,yes,yes")
+ (set_attr "predicable_short_it" "no")
(set_attr "type" "rev")]
)
