These patches are the PowerPC specific patches to add IEEE 128-bit support to
libgcc. These patches need to be co-ordinated with the glibc support that
provides the software floating point emulation. The compiler patches need to
be installed before these patches can be installed.
2014-07-15 Michael Meissner <meiss...@linux.vnet.ibm.com>
* config.host (powerpc64*-*-linux*): Add t-float128 to PowerPC
64-bit linux builds.
* config/rs6000/float128-int-vsx.c: New files to support IEEE
128-bit floating point (__float128) in PowerPC. Two versions of
the library support functions are built, one that passes and
returns the IEEE 128-bit floating point in vector registers, and
the other that passes references to the value.
* config/rs6000/float128-vsx.c: Likewise.
* config/rs6000/float128-int.c: Likewise.
* config/rs6000/float128-int-gpr.c: Likewise.
* config/rs6000/float128.c: Likewise.
* config/rs6000/float128.h: Likewise.
* config/rs6000/t-float128: Likewise.
* config/rs6000/float128-gpr.c: Likewise.
* config/rs6000/sfp-machine.h (_FP_W_TYPE_SIZE): On 64-bit
systems, use 64-bit types instead of 32-bit types.
(_FP_W_TYPE): Likewise.
(_FP_WS_TYPE): Likewise.
(_FP_I_TYPE): Likewise.
(_FP_MUL_MEAT_Q): Likewise.
(_FP_DIV_MEAT_Q): Likewise.
(_FP_NANFRAC_Q): Likewise.
(TItype): Define 128-bit integer types on 64-bit systems.
(UTItype): Likewise.
* config/rs6000/libgcc-glibc.ver: Mark that the __float128 support
functions need GCC 4.10 libraries.
--
Michael Meissner, IBM
IBM, M/S 2506R, 550 King Street, Littleton, MA 01460-6245, USA
email: meiss...@linux.vnet.ibm.com, phone: +1 (978) 899-4797
Index: libgcc/config.host
===================================================================
--- libgcc/config.host (.../svn+ssh://meiss...@gcc.gnu.org/svn/gcc/trunk)
(revision 212529)
+++ libgcc/config.host (working copy)
@@ -993,6 +993,11 @@ powerpc-*-rtems*)
tmake_file="${tmake_file} rs6000/t-ppccomm rs6000/t-savresfgpr
rs6000/t-crtstuff t-crtstuff-pic t-fdpbit"
extra_parts="$extra_parts crtbeginS.o crtendS.o crtbeginT.o ecrti.o
ecrtn.o ncrti.o ncrtn.o"
;;
+powerpc64*-*-linux*)
+ tmake_file="${tmake_file} rs6000/t-ppccomm rs6000/t-savresfgpr
rs6000/t-crtstuff rs6000/t-linux t-softfp-sfdf t-softfp-excl t-dfprules
rs6000/t-ppc64-fp t-softfp rs6000/t-float128 t-slibgcc-libgcc"
+ extra_parts="$extra_parts ecrti.o ecrtn.o ncrti.o ncrtn.o"
+ md_unwind_header=rs6000/linux-unwind.h
+ ;;
powerpc*-*-linux*)
tmake_file="${tmake_file} rs6000/t-ppccomm rs6000/t-savresfgpr
rs6000/t-crtstuff rs6000/t-linux t-softfp-sfdf t-softfp-excl t-dfprules
rs6000/t-ppc64-fp t-softfp t-slibgcc-libgcc"
extra_parts="$extra_parts ecrti.o ecrtn.o ncrti.o ncrtn.o"
Index: libgcc/config/rs6000/float128-int-vsx.c
===================================================================
--- libgcc/config/rs6000/float128-int-vsx.c
(.../svn+ssh://meiss...@gcc.gnu.org/svn/gcc/trunk) (revision 0)
+++ libgcc/config/rs6000/float128-int-vsx.c (revision 212529)
@@ -0,0 +1,44 @@
+/* Software IEEE 128-bit floating-point emulation for PowerPC.
+ Copyright (C) 2014 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+ Contributed by Michael Meissner (meiss...@linux.vnet.ibm.com)
+ Code is based on the main soft-fp library written by:
+ Richard Henderson (r...@cygnus.com) and
+ Jakub Jelinek (j...@ultra.linux.cz).
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ In addition to the permissions in the GNU Lesser General Public
+ License, the Free Software Foundation gives you unlimited
+ permission to link the compiled version of this file into
+ combinations with other programs, and to distribute those
+ combinations without any restriction coming from the use of this
+ file. (The Lesser General Public License restrictions do apply in
+ other respects; for example, they cover modification of the file,
+ and distribution when not linked into a combine executable.)
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+/* Support building the __float128 support with two options, -mfloat128-vsx
+ that passes and returns IEEE 128-bit values in a single vector register, and
+ -mfloat128-gpr that passes and returns IEEE 128-bit values by reference. */
+
+#pragma GCC target ("vsx,float128-vsx,no-float128-ref")
+
+#ifndef __FLOAT128_VSX__
+#define __FLOAT128_VSX__
+#endif
+
+#undef __FLOAT128_REF__
+
+#include "config/rs6000/float128-int.c"
Index: libgcc/config/rs6000/float128-vsx.c
===================================================================
--- libgcc/config/rs6000/float128-vsx.c
(.../svn+ssh://meiss...@gcc.gnu.org/svn/gcc/trunk) (revision 0)
+++ libgcc/config/rs6000/float128-vsx.c (revision 212529)
@@ -0,0 +1,44 @@
+/* Software IEEE 128-bit floating-point emulation for PowerPC.
+ Copyright (C) 2014 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+ Contributed by Michael Meissner (meiss...@linux.vnet.ibm.com)
+ Code is based on the main soft-fp library written by:
+ Richard Henderson (r...@cygnus.com) and
+ Jakub Jelinek (j...@ultra.linux.cz).
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ In addition to the permissions in the GNU Lesser General Public
+ License, the Free Software Foundation gives you unlimited
+ permission to link the compiled version of this file into
+ combinations with other programs, and to distribute those
+ combinations without any restriction coming from the use of this
+ file. (The Lesser General Public License restrictions do apply in
+ other respects; for example, they cover modification of the file,
+ and distribution when not linked into a combine executable.)
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+/* Support building the __float128 support with two options, -mfloat128-vsx
+ that passes and returns IEEE 128-bit values in a single vector register, and
+ -mfloat128-gpr that passes and returns IEEE 128-bit values by reference. */
+
+#pragma GCC target ("vsx,float128-vsx,no-float128-ref")
+
+#ifndef __FLOAT128_VSX__
+#define __FLOAT128_VSX__
+#endif
+
+#undef __FLOAT128_REF__
+
+#include "config/rs6000/float128.c"
Index: libgcc/config/rs6000/float128-int.c
===================================================================
--- libgcc/config/rs6000/float128-int.c
(.../svn+ssh://meiss...@gcc.gnu.org/svn/gcc/trunk) (revision 0)
+++ libgcc/config/rs6000/float128-int.c (revision 212529)
@@ -0,0 +1,91 @@
+/* Software IEEE 128-bit floating-point emulation for PowerPC.
+ Copyright (C) 2014 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+ Contributed by Michael Meissner (meiss...@linux.vnet.ibm.com)
+ Code is based on the main soft-fp library written by:
+ Richard Henderson (r...@cygnus.com) and
+ Jakub Jelinek (j...@ultra.linux.cz).
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ In addition to the permissions in the GNU Lesser General Public
+ License, the Free Software Foundation gives you unlimited
+ permission to link the compiled version of this file into
+ combinations with other programs, and to distribute those
+ combinations without any restriction coming from the use of this
+ file. (The Lesser General Public License restrictions do apply in
+ other respects; for example, they cover modification of the file,
+ and distribution when not linked into a combine executable.)
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#define FP_NO_EXCEPTIONS
+#include "float128.h"
+
+
+/* Convert signed 32-bit integer to IEEE 128-bit floating point. */
+
+TFtype
+F128_MAP(__floatsikf,_q_itoq) (SItype i)
+{
+ FP_DECL_Q (A);
+ TFtype a;
+
+ FP_FROM_INT_Q (A, i, SI_BITS, USItype);
+ FP_PACK_RAW_Q (a, A);
+
+ return a;
+}
+
+/* Convert signed 64-bit integer to IEEE 128-bit floating point. */
+
+TFtype
+F128_MAP(__floatdikf,_q_itoq_d) (DItype i)
+{
+ FP_DECL_Q (A);
+ TFtype a;
+
+ FP_FROM_INT_Q (A, i, DI_BITS, UDItype);
+ FP_PACK_RAW_Q (a, A);
+
+ return a;
+}
+
+
+/* Convert unsigned 32-bit integer to IEEE 128-bit floating point. */
+
+TFtype
+F128_MAP(__floatunsikf,_q_utoq) (USItype i)
+{
+ FP_DECL_Q (A);
+ TFtype a;
+
+ FP_FROM_INT_Q (A, i, SI_BITS, USItype);
+ FP_PACK_RAW_Q (a, A);
+
+ return a;
+}
+
+/* Convert unsigned 64-bit integer to IEEE 128-bit floating point. */
+
+TFtype
+F128_MAP(__floatundikf,_q_utoq_d) (UDItype i)
+{
+ FP_DECL_Q (A);
+ TFtype a;
+
+ FP_FROM_INT_Q (A, i, DI_BITS, UDItype);
+ FP_PACK_RAW_Q (a, A);
+
+ return a;
+}
Index: libgcc/config/rs6000/float128-int-gpr.c
===================================================================
--- libgcc/config/rs6000/float128-int-gpr.c
(.../svn+ssh://meiss...@gcc.gnu.org/svn/gcc/trunk) (revision 0)
+++ libgcc/config/rs6000/float128-int-gpr.c (revision 212529)
@@ -0,0 +1,44 @@
+/* Software IEEE 128-bit floating-point emulation for PowerPC.
+ Copyright (C) 2014 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+ Contributed by Michael Meissner (meiss...@linux.vnet.ibm.com)
+ Code is based on the main soft-fp library written by:
+ Richard Henderson (r...@cygnus.com) and
+ Jakub Jelinek (j...@ultra.linux.cz).
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ In addition to the permissions in the GNU Lesser General Public
+ License, the Free Software Foundation gives you unlimited
+ permission to link the compiled version of this file into
+ combinations with other programs, and to distribute those
+ combinations without any restriction coming from the use of this
+ file. (The Lesser General Public License restrictions do apply in
+ other respects; for example, they cover modification of the file,
+ and distribution when not linked into a combine executable.)
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+/* Support building the __float128 support with two options, -mfloat128-vsx
+ that passes and returns IEEE 128-bit values in a single vector register, and
+ -mfloat128-gpr that passes and returns IEEE 128-bit values by reference. */
+
+#pragma GCC target ("float128-ref,no-float128-vsx")
+
+#ifndef __FLOAT128_REF__
+#define __FLOAT128_REF__
+#endif
+
+#undef __FLOAT128_VSX__
+
+#include "config/rs6000/float128-int.c"
Index: libgcc/config/rs6000/float128.c
===================================================================
--- libgcc/config/rs6000/float128.c
(.../svn+ssh://meiss...@gcc.gnu.org/svn/gcc/trunk) (revision 0)
+++ libgcc/config/rs6000/float128.c (revision 212529)
@@ -0,0 +1,721 @@
+/* Software IEEE 128-bit floating-point emulation for PowerPC.
+ Copyright (C) 2014 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+ Contributed by Michael Meissner (meiss...@linux.vnet.ibm.com)
+ Code is based on the main soft-fp library written by:
+ Richard Henderson (r...@cygnus.com) and
+ Jakub Jelinek (j...@ultra.linux.cz).
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ In addition to the permissions in the GNU Lesser General Public
+ License, the Free Software Foundation gives you unlimited
+ permission to link the compiled version of this file into
+ combinations with other programs, and to distribute those
+ combinations without any restriction coming from the use of this
+ file. (The Lesser General Public License restrictions do apply in
+ other respects; for example, they cover modification of the file,
+ and distribution when not linked into a combine executable.)
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#include "float128.h"
+
+
+/* Add two IEEE 128-bit floating point values. */
+
+TFtype
+F128_MAP(__addkf3,_q_add) (TFtype a, TFtype b)
+{
+ FP_DECL_EX;
+ FP_DECL_Q (A);
+ FP_DECL_Q (B);
+ FP_DECL_Q (R);
+ TFtype r;
+
+ FP_INIT_ROUNDMODE;
+ FP_UNPACK_SEMIRAW_Q (A, a);
+ FP_UNPACK_SEMIRAW_Q (B, b);
+ FP_ADD_Q (R, A, B);
+ FP_PACK_SEMIRAW_Q (r, R);
+ FP_HANDLE_EXCEPTIONS;
+
+ return r;
+}
+
+/* Subtract two IEEE 128-bit floating point values. */
+
+TFtype
+F128_MAP(__subkf3,_q_sub) (TFtype a, TFtype b)
+{
+ FP_DECL_EX;
+ FP_DECL_Q (A);
+ FP_DECL_Q (B);
+ FP_DECL_Q (R);
+ TFtype r;
+
+ FP_INIT_ROUNDMODE;
+ FP_UNPACK_SEMIRAW_Q (A, a);
+ FP_UNPACK_SEMIRAW_Q (B, b);
+ FP_SUB_Q (R, A, B);
+ FP_PACK_SEMIRAW_Q (r, R);
+ FP_HANDLE_EXCEPTIONS;
+
+ return r;
+}
+
+/* Multiply two IEEE 128-bit floating point values. */
+
+TFtype
+F128_MAP(__mulkf3,_q_mul) (TFtype a, TFtype b)
+{
+ FP_DECL_EX;
+ FP_DECL_Q (A);
+ FP_DECL_Q (B);
+ FP_DECL_Q (R);
+ TFtype r;
+
+ FP_INIT_ROUNDMODE;
+ FP_UNPACK_Q (A, a);
+ FP_UNPACK_Q (B, b);
+ FP_MUL_Q (R, A, B);
+ FP_PACK_Q (r, R);
+ FP_HANDLE_EXCEPTIONS;
+
+ return r;
+}
+
+/* Divide two IEEE 128-bit floating point values. */
+
+TFtype
+F128_MAP(__divkf3,_q_div) (TFtype a, TFtype b)
+{
+ FP_DECL_EX;
+ FP_DECL_Q (A);
+ FP_DECL_Q (B);
+ FP_DECL_Q (R);
+ TFtype r;
+
+ FP_INIT_ROUNDMODE;
+ FP_UNPACK_Q (A, a);
+ FP_UNPACK_Q (B, b);
+ FP_DIV_Q (R, A, B);
+ FP_PACK_Q (r, R);
+ FP_HANDLE_EXCEPTIONS;
+
+ return r;
+}
+
+/* Negate an IEEE 128-bit floating point value. */
+
+TFtype
+F128_MAP(__negkf2,_q_neg) (TFtype a)
+{
+ FP_DECL_EX;
+ FP_DECL_Q (A);
+ FP_DECL_Q (R);
+ TFtype r;
+
+ FP_INIT_ROUNDMODE;
+ FP_UNPACK_SEMIRAW_Q (A, a);
+ FP_NEG_Q (R, A);
+ FP_PACK_SEMIRAW_Q (r, R);
+ FP_HANDLE_EXCEPTIONS;
+
+ return r;
+}
+
+/* Do a square root of an IEEE 128-bit floating point value. */
+
+TFtype
+F128_MAP(__sqrtkf2,_q_sqrt) (TFtype a)
+{
+ FP_DECL_EX;
+ FP_DECL_Q (A);
+ FP_DECL_Q (R);
+ TFtype r;
+
+ FP_INIT_ROUNDMODE;
+ FP_UNPACK_Q (A, a);
+ FP_SQRT_Q (R, A);
+ FP_PACK_Q (r, R);
+ FP_HANDLE_EXCEPTIONS;
+
+ return r;
+}
+
+
+/* Convert single precision floating point to IEEE 128-bit floating point. */
+
+TFtype
+F128_MAP(__extendsfkf2,_q_stoq) (SFtype a)
+{
+ FP_DECL_EX;
+ FP_DECL_S (A);
+ FP_DECL_Q (R);
+ TFtype r;
+
+ FP_INIT_EXCEPTIONS;
+ FP_UNPACK_RAW_S (A, a);
+#if (2 * _FP_W_TYPE_SIZE) < _FP_FRACBITS_Q
+ FP_EXTEND (Q, S, 4, 1, R, A);
+#else
+ FP_EXTEND (Q, S, 2, 1, R, A);
+#endif
+ FP_PACK_RAW_Q (r, R);
+ FP_HANDLE_EXCEPTIONS;
+
+ return r;
+}
+
+/* Convert double precision floating point to IEEE 128-bit floating point. */
+
+TFtype
+F128_MAP(__extenddfkf2,_q_dtoq) (DFtype a)
+{
+ FP_DECL_EX;
+ FP_DECL_D (A);
+ FP_DECL_Q (R);
+ TFtype r;
+
+ FP_INIT_EXCEPTIONS;
+ FP_UNPACK_RAW_D (A, a);
+#if (2 * _FP_W_TYPE_SIZE) < _FP_FRACBITS_Q
+ FP_EXTEND (Q, D, 4, 2, R, A);
+#else
+ FP_EXTEND (Q, D, 2, 1, R, A);
+#endif
+ FP_PACK_RAW_Q (r, R);
+ FP_HANDLE_EXCEPTIONS;
+
+ return r;
+}
+
+
+/* Convert IEEE 128-bit floating point to IBM long double. */
+
+#if defined(__LONG_DOUBLE_128__) && !defined(__LONG_DOUBLE_IEEE128__)
+
+IFtype
+F128_MAP(__extendkftf2,_q_qtot) (TFtype value)
+{
+ double high, low;
+
+ high = F128_MAP (__trunckfdf2,_q_qtod) (value);
+ if (__builtin_isnan (high) || __builtin_isinf (high))
+ low = high;
+
+ else
+ {
+ TFtype high_f128 = F128_MAP (__extenddfkf2,_q_qtod) (high);
+ TFtype low_f128 = F128_MAP (__subkf3,_q_sub) (value, high_f128);
+
+ /* If we are on a power6 or newer, we can use copysign to propigate the
+ sign bit so that -0.0Q becomes -0.0L. If we are on an older platform,
+ we need to handle the sign propigation. */
+#ifdef _ARCH_PWR6
+ low = __builtin_copysign (F128_MAP (__trunckfdf2,_q_qtod) (low_f128),
high);
+#else
+ low = F128_MAP (__trunckfdf2,_q_qtod) (low_f128);
+ if (high == 0.0 && low == 0.0)
+ low = high; /* just in case it is -0.0 */
+ else if (high < 0)
+ low = - __builtin_fabs (low);
+ else
+ low = __builtin_fabs (low);
+#endif /* no copysign */
+ }
+
+#ifdef __LITTLE_ENDIAN__
+ return __builtin_pack_longdouble (low, high);
+#else
+ return __builtin_pack_longdouble (high, low);
+#endif
+}
+#endif /* long double is IBM long double. */
+
+
+/* Convert IEEE 128-bit floating point to single precision floating point. */
+
+SFtype
+F128_MAP(__trunckfsf2,_q_qtos) (TFtype a)
+{
+ FP_DECL_EX;
+ FP_DECL_Q (A);
+ FP_DECL_S (R);
+ SFtype r;
+
+ FP_INIT_ROUNDMODE;
+ FP_UNPACK_SEMIRAW_Q (A, a);
+#if (2 * _FP_W_TYPE_SIZE) < _FP_FRACBITS_Q
+ FP_TRUNC (S, Q, 1, 4, R, A);
+#else
+ FP_TRUNC (S, Q, 1, 2, R, A);
+#endif
+ FP_PACK_SEMIRAW_S (r, R);
+ FP_HANDLE_EXCEPTIONS;
+
+ return r;
+}
+
+/* Convert IEEE 128-bit floating point to double precision floating point. */
+
+DFtype
+F128_MAP(__trunckfdf2,_q_qtod) (TFtype a)
+{
+ FP_DECL_EX;
+ FP_DECL_Q (A);
+ FP_DECL_D (R);
+ DFtype r;
+
+ FP_INIT_ROUNDMODE;
+ FP_UNPACK_SEMIRAW_Q (A, a);
+#if (2 * _FP_W_TYPE_SIZE) < _FP_FRACBITS_Q
+ FP_TRUNC (D, Q, 2, 4, R, A);
+#else
+ FP_TRUNC (D, Q, 1, 2, R, A);
+#endif
+ FP_PACK_SEMIRAW_D (r, R);
+ FP_HANDLE_EXCEPTIONS;
+
+ return r;
+}
+
+
+/* Convert IBM long double to IEEE 128-bit floating point. */
+#if defined(__LONG_DOUBLE_128__) && !defined(__LONG_DOUBLE_IEEE128__)
+
+TFtype
+F128_MAP(__trunctfkf2,_q_ttoq) (IFtype value)
+{
+ TFtype high_f128, low_f128;
+#ifdef __LITTLE_ENDIAN__
+ double high = __builtin_unpack_longdouble (value, 0);
+ double low = __builtin_unpack_longdouble (value, 1);
+#else
+ double high = __builtin_unpack_longdouble (value, 1);
+ double low = __builtin_unpack_longdouble (value, 0);
+#endif
+
+ if (__builtin_isnan (high))
+ return (TFtype) __builtin_nan ("");
+
+ if (__builtin_isinf (high))
+ return (TFtype) __builtin_inf ();
+
+ high_f128 = F128_MAP (__extenddfkf2,_q_dtoq) (high);
+
+ if (low == 0.0)
+ return high_f128;
+
+ low_f128 = F128_MAP (__extenddfkf2,_q_dtoq) (low);
+ return F128_MAP (__addkf3,_q_add) (high_f128, low_f128);
+}
+#endif /* long double is IBM long double. */
+
+
+/* Convert IEEE 128-bit floating point to signed 32-bit integer. */
+
+SItype
+F128_MAP(__fixkfsi,_q_qtoi) (TFtype a)
+{
+ FP_DECL_EX;
+ FP_DECL_Q (A);
+ USItype r;
+
+ FP_INIT_EXCEPTIONS;
+ FP_UNPACK_RAW_Q (A, a);
+ FP_TO_INT_Q (r, A, SI_BITS, 1);
+ FP_HANDLE_EXCEPTIONS;
+
+ return r;
+}
+
+/* Convert IEEE 128-bit floating point to signed 64-bit integer. */
+
+DItype
+F128_MAP(__fixkfdi,_q_qtoi_d) (TFtype a)
+{
+ FP_DECL_EX;
+ FP_DECL_Q (A);
+ UDItype r;
+
+ FP_INIT_EXCEPTIONS;
+ FP_UNPACK_RAW_Q (A, a);
+ FP_TO_INT_Q (r, A, DI_BITS, 1);
+ FP_HANDLE_EXCEPTIONS;
+
+ return r;
+}
+
+
+/* Convert IEEE 128-bit floating point to unsigned 32-bit integer. */
+
+USItype
+F128_MAP(__fixunskfsi,_q_qtou) (TFtype a)
+{
+ FP_DECL_EX;
+ FP_DECL_Q (A);
+ USItype r;
+
+ FP_INIT_EXCEPTIONS;
+ FP_UNPACK_RAW_Q (A, a);
+ FP_TO_INT_Q (r, A, SI_BITS, 0);
+ FP_HANDLE_EXCEPTIONS;
+
+ return r;
+}
+
+/* Convert IEEE 128-bit floating point to unsigned 64-bit integer. */
+
+UDItype
+F128_MAP(__fixunskfdi,_q_qtou_d) (TFtype a)
+{
+ FP_DECL_EX;
+ FP_DECL_Q (A);
+ UDItype r;
+
+ FP_INIT_EXCEPTIONS;
+ FP_UNPACK_RAW_Q (A, a);
+ FP_TO_INT_Q (r, A, DI_BITS, 0);
+ FP_HANDLE_EXCEPTIONS;
+
+ return r;
+}
+
+
+/* PowerPC condition register bits. */
+#define PPC_UNORDERED 0x1 /* isnan (a) || isnan (b). */
+#define PPC_EQUAL 0x2 /* a == b. */
+#define PPC_GREATER_THEN 0x4 /* a > b. */
+#define PPC_LESS_THEN 0x8 /* a < b. */
+
+/* Map FP_CMP_Q output to PowerPC condition register bits. */
+#define CMP_UNORDERED (-2) /* isnan (a) || isnan (b). */
+#define CMP_LESS_THEN (-1) /* a < b. */
+#define CMP_EQUAL 0 /* a == b. */
+#define CMP_GREATER_THEN 1 /* a < b. */
+#define CMP_INVALID 2 /* raise invalid exception. */
+
+#define CMP_LOW CMP_UNORDERED /* comparison low
value. */
+#define CMP_HIGH CMP_INVALID /* comparison high value. */
+
+static const unsigned char ppc_cr_map[] = {
+ PPC_UNORDERED, /* -2: unordered. */
+ PPC_LESS_THEN, /* -1: a < b. */
+ PPC_EQUAL, /* 0: a == b. */
+ PPC_GREATER_THEN, /* 1: a > b. */
+ PPC_UNORDERED, /* 2: invalid. */
+};
+
+/* Compare two IEEE 128-bit floating point values and return the status. We
+ return the status as a 4-bit value that can be copied into an appropriate
+ conditon code register. */
+
+CMPtype
+F128_MAP(__cmpkf2,_q_fcmp) (TFtype a, TFtype b)
+{
+ FP_DECL_EX;
+ FP_DECL_Q (A);
+ FP_DECL_Q (B);
+ CMPtype r;
+
+ FP_INIT_EXCEPTIONS;
+ FP_UNPACK_RAW_Q (A, a);
+ FP_UNPACK_RAW_Q (B, b);
+ FP_CMP_Q (r, A, B, 2);
+ if (r == CMP_INVALID)
+ FP_SET_EXCEPTION (FP_EX_INVALID);
+ FP_HANDLE_EXCEPTIONS;
+
+ return (r < CMP_LOW || r > CMP_HIGH) ? PPC_UNORDERED : ppc_cr_map[r-CMP_LOW];
+}
+
+
+/* Return non-zero if IEEE 128-bit floating point a == b. */
+
+CMPtype
+F128_MAP(__eqkf2,_q_feq) (TFtype a, TFtype b)
+{
+ FP_DECL_EX;
+ FP_DECL_Q (A);
+ FP_DECL_Q (B);
+ CMPtype r;
+
+ FP_INIT_EXCEPTIONS;
+ FP_UNPACK_RAW_Q (A, a);
+ FP_UNPACK_RAW_Q (B, b);
+ FP_CMP_Q (r, A, B, 2);
+ if (r == CMP_INVALID)
+ FP_SET_EXCEPTION (FP_EX_INVALID);
+ FP_HANDLE_EXCEPTIONS;
+
+ return (r == CMP_EQUAL);
+}
+
+/* Return non-zero if IEEE 128-bit floating point a != b. */
+
+CMPtype
+F128_MAP(__nekf2,_q_fne) (TFtype a, TFtype b)
+{
+ FP_DECL_EX;
+ FP_DECL_Q (A);
+ FP_DECL_Q (B);
+ CMPtype r;
+
+ FP_INIT_EXCEPTIONS;
+ FP_UNPACK_RAW_Q (A, a);
+ FP_UNPACK_RAW_Q (B, b);
+ FP_CMP_Q (r, A, B, 2);
+ if (r == CMP_INVALID)
+ FP_SET_EXCEPTION (FP_EX_INVALID);
+ FP_HANDLE_EXCEPTIONS;
+
+ return (r != CMP_EQUAL);
+}
+
+/* Return non-zero if IEEE 128-bit floating point a < b. */
+
+CMPtype
+F128_MAP(__ltkf2,_q_flt) (TFtype a, TFtype b)
+{
+ FP_DECL_EX;
+ FP_DECL_Q (A);
+ FP_DECL_Q (B);
+ CMPtype r;
+
+ FP_INIT_EXCEPTIONS;
+ FP_UNPACK_RAW_Q (A, a);
+ FP_UNPACK_RAW_Q (B, b);
+ FP_CMP_Q (r, A, B, 2);
+ if (r == CMP_INVALID)
+ FP_SET_EXCEPTION (FP_EX_INVALID);
+ FP_HANDLE_EXCEPTIONS;
+
+ return (r == CMP_LESS_THEN);
+}
+
+/* Return non-zero if IEEE 128-bit floating point a <= b. */
+
+CMPtype
+F128_MAP(__lekf2,_q_fle) (TFtype a, TFtype b)
+{
+ FP_DECL_EX;
+ FP_DECL_Q (A);
+ FP_DECL_Q (B);
+ CMPtype r;
+
+ FP_INIT_EXCEPTIONS;
+ FP_UNPACK_RAW_Q (A, a);
+ FP_UNPACK_RAW_Q (B, b);
+ FP_CMP_Q (r, A, B, 2);
+ if (r == CMP_INVALID)
+ FP_SET_EXCEPTION (FP_EX_INVALID);
+ FP_HANDLE_EXCEPTIONS;
+
+ return (r == CMP_EQUAL) || (r == CMP_LESS_THEN);
+}
+
+/* Return non-zero if IEEE 128-bit floating point a > b. */
+
+CMPtype
+F128_MAP(__gtkf2,_q_fgt) (TFtype a, TFtype b)
+{
+ FP_DECL_EX;
+ FP_DECL_Q (A);
+ FP_DECL_Q (B);
+ CMPtype r;
+
+ FP_INIT_EXCEPTIONS;
+ FP_UNPACK_RAW_Q (A, a);
+ FP_UNPACK_RAW_Q (B, b);
+ FP_CMP_Q (r, A, B, 2);
+ if (r == CMP_INVALID)
+ FP_SET_EXCEPTION (FP_EX_INVALID);
+ FP_HANDLE_EXCEPTIONS;
+
+ return (r == CMP_GREATER_THEN);
+}
+
+/* Return non-zero if IEEE 128-bit floating point a >= b. */
+
+CMPtype
+F128_MAP(__gekf2,_q_fge) (TFtype a, TFtype b)
+{
+ FP_DECL_EX;
+ FP_DECL_Q (A);
+ FP_DECL_Q (B);
+ CMPtype r;
+
+ FP_INIT_EXCEPTIONS;
+ FP_UNPACK_RAW_Q (A, a);
+ FP_UNPACK_RAW_Q (B, b);
+ FP_CMP_Q (r, A, B, 2);
+ if (r == CMP_INVALID)
+ FP_SET_EXCEPTION (FP_EX_INVALID);
+ FP_HANDLE_EXCEPTIONS;
+
+ return (r == CMP_EQUAL) || (r == CMP_GREATER_THEN);
+}
+
+/* Return non-zero if IEEE 128-bit floating point a == b || isnan (a)
+ || isnan (b). */
+
+CMPtype
+F128_MAP(__uneqkf2,_q_funeq) (TFtype a, TFtype b)
+{
+ FP_DECL_EX;
+ FP_DECL_Q (A);
+ FP_DECL_Q (B);
+ CMPtype r;
+
+ FP_INIT_EXCEPTIONS;
+ FP_UNPACK_RAW_Q (A, a);
+ FP_UNPACK_RAW_Q (B, b);
+ FP_CMP_Q (r, A, B, 2);
+ if (r == CMP_INVALID)
+ FP_SET_EXCEPTION (FP_EX_INVALID);
+ FP_HANDLE_EXCEPTIONS;
+
+ return (r == CMP_EQUAL) || (r == CMP_UNORDERED) || (r == CMP_INVALID);
+}
+
+/* Return non-zero if IEEE 128-bit floating point a > b || isnan (a)
+ || isnan (b). */
+
+CMPtype
+F128_MAP(__ungtkf2,_q_fungt) (TFtype a, TFtype b)
+{
+ FP_DECL_EX;
+ FP_DECL_Q (A);
+ FP_DECL_Q (B);
+ CMPtype r;
+
+ FP_INIT_EXCEPTIONS;
+ FP_UNPACK_RAW_Q (A, a);
+ FP_UNPACK_RAW_Q (B, b);
+ FP_CMP_Q (r, A, B, 2);
+ if (r == CMP_INVALID)
+ FP_SET_EXCEPTION (FP_EX_INVALID);
+ FP_HANDLE_EXCEPTIONS;
+
+ return (r == CMP_GREATER_THEN) || (r == CMP_UNORDERED) || (r == CMP_INVALID);
+}
+
+/* Return non-zero if IEEE 128-bit floating point a >= b || isnan (a)
+ || isnan (b). */
+
+CMPtype
+F128_MAP(__ungekf2,_q_funge) (TFtype a, TFtype b)
+{
+ FP_DECL_EX;
+ FP_DECL_Q (A);
+ FP_DECL_Q (B);
+ CMPtype r;
+
+ FP_INIT_EXCEPTIONS;
+ FP_UNPACK_RAW_Q (A, a);
+ FP_UNPACK_RAW_Q (B, b);
+ FP_CMP_Q (r, A, B, 2);
+ if (r == CMP_INVALID)
+ FP_SET_EXCEPTION (FP_EX_INVALID);
+ FP_HANDLE_EXCEPTIONS;
+
+ return (r != CMP_LESS_THEN);
+}
+
+/* Return non-zero if IEEE 128-bit floating point a < b || isnan (a)
+ || isnan (b). */
+
+CMPtype
+F128_MAP(__unltkf2,_q_funlt) (TFtype a, TFtype b)
+{
+ FP_DECL_EX;
+ FP_DECL_Q (A);
+ FP_DECL_Q (B);
+ CMPtype r;
+
+ FP_INIT_EXCEPTIONS;
+ FP_UNPACK_RAW_Q (A, a);
+ FP_UNPACK_RAW_Q (B, b);
+ FP_CMP_Q (r, A, B, 2);
+ if (r == CMP_INVALID)
+ FP_SET_EXCEPTION (FP_EX_INVALID);
+ FP_HANDLE_EXCEPTIONS;
+
+ return (r == CMP_LESS_THEN) || (r == CMP_UNORDERED) || (r == CMP_INVALID);
+}
+
+/* Return non-zero if IEEE 128-bit floating point a <= b || isnan (a)
+ || isnan (b). */
+
+CMPtype
+F128_MAP(__unlekf2,_q_funle) (TFtype a, TFtype b)
+{
+ FP_DECL_EX;
+ FP_DECL_Q (A);
+ FP_DECL_Q (B);
+ CMPtype r;
+
+ FP_INIT_EXCEPTIONS;
+ FP_UNPACK_RAW_Q (A, a);
+ FP_UNPACK_RAW_Q (B, b);
+ FP_CMP_Q (r, A, B, 2);
+ if (r == CMP_INVALID)
+ FP_SET_EXCEPTION (FP_EX_INVALID);
+ FP_HANDLE_EXCEPTIONS;
+
+ return (r != CMP_LESS_THEN);
+}
+
+/* Return non-zero if IEEE 128-bit floating point !isnan (a) && !isnan (b). */
+
+CMPtype
+F128_MAP(__orderedkf2,_q_fordered) (TFtype a, TFtype b)
+{
+ FP_DECL_EX;
+ FP_DECL_Q (A);
+ FP_DECL_Q (B);
+ CMPtype r;
+
+ FP_INIT_EXCEPTIONS;
+ FP_UNPACK_RAW_Q (A, a);
+ FP_UNPACK_RAW_Q (B, b);
+ FP_CMP_Q (r, A, B, 2);
+ if (r == CMP_INVALID)
+ FP_SET_EXCEPTION (FP_EX_INVALID);
+ FP_HANDLE_EXCEPTIONS;
+
+ return (r != CMP_UNORDERED) && (r != CMP_INVALID);
+}
+
+/* Return non-zero if IEEE 128-bit floating point isnan (a) || isnan (b). */
+
+CMPtype
+F128_MAP(__unordkf2,_q_funordered) (TFtype a, TFtype b)
+{
+ FP_DECL_EX;
+ FP_DECL_Q (A);
+ FP_DECL_Q (B);
+ CMPtype r;
+
+ FP_INIT_EXCEPTIONS;
+ FP_UNPACK_RAW_Q (A, a);
+ FP_UNPACK_RAW_Q (B, b);
+ FP_CMP_Q (r, A, B, 2);
+ if (r == CMP_INVALID)
+ FP_SET_EXCEPTION (FP_EX_INVALID);
+ FP_HANDLE_EXCEPTIONS;
+
+ return (r == CMP_UNORDERED) || (r == CMP_INVALID);
+}
Index: libgcc/config/rs6000/float128.h
===================================================================
--- libgcc/config/rs6000/float128.h
(.../svn+ssh://meiss...@gcc.gnu.org/svn/gcc/trunk) (revision 0)
+++ libgcc/config/rs6000/float128.h (revision 212529)
@@ -0,0 +1,106 @@
+/* Software IEEE 128-bit floating-point emulation for PowerPC.
+ Copyright (C) 2014 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+ Contributed by Michael Meissner (meiss...@linux.vnet.ibm.com)
+ Code is based on the main soft-fp library written by:
+ Richard Henderson (r...@cygnus.com) and
+ Jakub Jelinek (j...@ultra.linux.cz).
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ In addition to the permissions in the GNU Lesser General Public
+ License, the Free Software Foundation gives you unlimited
+ permission to link the compiled version of this file into
+ combinations with other programs, and to distribute those
+ combinations without any restriction coming from the use of this
+ file. (The Lesser General Public License restrictions do apply in
+ other respects; for example, they cover modification of the file,
+ and distribution when not linked into a combine executable.)
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+/* Redefine TFtype, so that is __float128 and not long double. */
+#ifndef TFtype
+#define TFtype __float128
+#endif
+
+/* Use IFtype for IBM long double. */
+#if defined(__LONG_DOUBLE_128__) && !defined(__LONG_DOUBLE_IEEE128__)
+#ifndef IFtype
+#define IFtype long double
+#endif
+#endif
+
+#include "soft-fp/soft-fp.h"
+#include "soft-fp/quad.h"
+#include "soft-fp/double.h"
+#include "soft-fp/single.h"
+
+#ifndef __FLOAT128__
+#error "-mfloat128-vsx or -mfloat128-ref is required"
+#endif
+
+/* Depending on options, we want to create two different names, one that passes
+ the values as VSX types, and the other that passes values by reference. */
+#ifdef __FLOAT128_VSX__
+#define F128_MAP(VSX,GPR) VSX
+#else
+#define F128_MAP(VSX,GPR) GPR
+#endif
+
+/* Declare all of the support functions. */
+extern TFtype F128_MAP(__addkf3,_q_add) (TFtype, TFtype);
+extern TFtype F128_MAP(__subkf3,_q_sub) (TFtype, TFtype);
+extern TFtype F128_MAP(__mulkf3,_q_mul) (TFtype, TFtype);
+extern TFtype F128_MAP(__divkf3,_q_div) (TFtype, TFtype);
+extern TFtype F128_MAP(__negkf2,_q_neg) (TFtype);
+extern TFtype F128_MAP(__sqrtkf2,_q_sqrt) (TFtype);
+
+extern CMPtype F128_MAP(__cmpkf2,_q_fcmp) (TFtype, TFtype);
+extern CMPtype F128_MAP(__eqkf2,_q_feq) (TFtype, TFtype);
+extern CMPtype F128_MAP(__nekf2,_q_fne) (TFtype, TFtype);
+extern CMPtype F128_MAP(__ltkf2,_q_flt) (TFtype, TFtype);
+extern CMPtype F128_MAP(__lekf2,_q_fle) (TFtype, TFtype);
+extern CMPtype F128_MAP(__gtkf2,_q_fgt) (TFtype, TFtype);
+extern CMPtype F128_MAP(__gekf2,_q_fge) (TFtype, TFtype);
+extern CMPtype F128_MAP(__uneqkf2,_q_funeq) (TFtype, TFtype);
+extern CMPtype F128_MAP(__ungekf2,_q_funge) (TFtype, TFtype);
+extern CMPtype F128_MAP(__ungtkf2,_q_fungt) (TFtype, TFtype);
+extern CMPtype F128_MAP(__unlekf2,_q_funle) (TFtype, TFtype);
+extern CMPtype F128_MAP(__unltkf2,_q_funlt) (TFtype, TFtype);
+extern CMPtype F128_MAP(__ltgtkf2,_q_fltgt) (TFtype, TFtype);
+
+extern CMPtype F128_MAP(__unordkf2,_q_funordered) (TFtype, TFtype);
+extern CMPtype F128_MAP(__orderedkf2,_q_fordered) (TFtype, TFtype);
+
+extern TFtype F128_MAP(__extenddfkf2,_q_dtoq) (DFtype);
+extern TFtype F128_MAP(__extendsfkf2,_q_stoq) (SFtype);
+
+extern DFtype F128_MAP(__trunckfdf2,_q_qtod) (TFtype);
+extern SFtype F128_MAP(__trunckfsf2,_q_qtos) (TFtype);
+
+extern SItype F128_MAP(__fixkfsi,_q_qtoi) (TFtype);
+extern DItype F128_MAP(__fixkfdi,_q_qtoi_d) (TFtype);
+extern USItype F128_MAP(__fixunskfsi,_q_qtou) (TFtype);
+extern UDItype F128_MAP(__fixunskfdi,_q_qtou_d) (TFtype);
+
+extern TFtype F128_MAP(__floatsikf,_q_itoq) (SItype);
+extern TFtype F128_MAP(__floatdikf,_q_itoq_d) (DItype);
+
+extern TFtype F128_MAP(__floatunsikf,_q_utoq) (USItype);
+extern TFtype F128_MAP(__floatundikf,_q_utoq_d) (UDItype);
+
+#if defined(__LONG_DOUBLE_128__) && !defined(__LONG_DOUBLE_IEEE128__)
+extern IFtype F128_MAP(__extendkftf2,_q_qtot) (TFtype);
+extern TFtype F128_MAP(__trunctfkf2,_q_ttoq) (IFtype);
+#endif
Index: libgcc/config/rs6000/t-float128
===================================================================
--- libgcc/config/rs6000/t-float128
(.../svn+ssh://meiss...@gcc.gnu.org/svn/gcc/trunk) (revision 0)
+++ libgcc/config/rs6000/t-float128 (revision 212529)
@@ -0,0 +1,47 @@
+# Support for adding __float128 to the powerpc. The __float128 type is
+# restricted to VSX systems so that we can pass the value in VSX registers.
+
+fp128_vsx_src = $(srcdir)/config/rs6000/float128-vsx.c \
+ $(srcdir)/config/rs6000/float128-int-vsx.c
+
+fp128_vsx_objects_base = $(basename $(notdir $(fp128_vsx_src)))
+fp128_vsx_objects = $(addsuffix $(objext),$(fp128_vsx_objects_base))
+
+fp128_gpr_src = $(srcdir)/config/rs6000/float128-gpr.c \
+ $(srcdir)/config/rs6000/float128-int-gpr.c
+
+fp128_gpr_objects_base = $(basename $(notdir $(fp128_gpr_src)))
+fp128_gpr_objects = $(addsuffix $(objext),$(fp128_gpr_objects_base))
+
+fp128_objects = $(fp128_vsx_objects) $(fp128_gpr_objects)
+
+FP128_COMMON_CFLAGS = -Wno-missing-prototypes -Wno-type-limits \
+ -DTFtype=__float128
+
+FP128_VSX_CFLAGS = $(FP128_COMMON_CFLAGS) -mvsx -mfloat128-vsx \
+ -mno-float128-ref
+FP128_GPR_CFLAGS = $(FP128_COMMON_CFLAGS) -mfloat128-ref \
+ -mno-float128-vsx
+
+$(fp128_vsx_objects) : INTERNAL_CFLAGS += $(FP128_VSX_CFLAGS)
+$(fp128_gpr_objects) : INTERNAL_CFLAGS += $(FP128_GPR_CFLAGS)
+
+$(fp128_objects) : $(addprefix $(srcdir)/config/rs6000/,$<)
+$(fp128_objects) : $(srcdir)/config/rs6000/float128.c
+$(fp128_objects) : $(srcdir)/config/rs6000/float128-int.c
+$(fp128_objects) : $(srcdir)/config/rs6000/float128.h
+$(fp128_objects) : $(srcdir)/config/rs6000/t-float128
+$(fp128_objects) : $(srcdir)/soft-fp/soft-fp.h
+$(fp128_objects) : $(srcdir)/soft-fp/quad.h
+$(fp128_objects) : $(srcdir)/soft-fp/double.h
+$(fp128_objects) : $(srcdir)/soft-fp/single.h
+$(fp128_objects) : $(srcdir)/soft-fp/soft-fp.h
+$(fp128_objects) : $(srcdir)/soft-fp/extended.h
+$(fp128_objects) : $(srcdir)/soft-fp/op-1.h
+$(fp128_objects) : $(srcdir)/soft-fp/op-2.h
+$(fp128_objects) : $(srcdir)/soft-fp/op-4.h
+$(fp128_objects) : $(srcdir)/soft-fp/op-8.h
+$(fp128_objects) : $(srcdir)/soft-fp/op-common.h
+
+LIB2ADD += $(fp128_vsx_src) $(fp128_gpr_src)
+
Index: libgcc/config/rs6000/float128-gpr.c
===================================================================
--- libgcc/config/rs6000/float128-gpr.c
(.../svn+ssh://meiss...@gcc.gnu.org/svn/gcc/trunk) (revision 0)
+++ libgcc/config/rs6000/float128-gpr.c (revision 212529)
@@ -0,0 +1,44 @@
+/* Software IEEE 128-bit floating-point emulation for PowerPC.
+ Copyright (C) 2014 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+ Contributed by Michael Meissner (meiss...@linux.vnet.ibm.com)
+ Code is based on the main soft-fp library written by:
+ Richard Henderson (r...@cygnus.com) and
+ Jakub Jelinek (j...@ultra.linux.cz).
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ In addition to the permissions in the GNU Lesser General Public
+ License, the Free Software Foundation gives you unlimited
+ permission to link the compiled version of this file into
+ combinations with other programs, and to distribute those
+ combinations without any restriction coming from the use of this
+ file. (The Lesser General Public License restrictions do apply in
+ other respects; for example, they cover modification of the file,
+ and distribution when not linked into a combine executable.)
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+/* Support building the __float128 support with two options, -mfloat128-vsx
+ that passes and returns IEEE 128-bit values in a single vector register, and
+ -mfloat128-gpr that passes and returns IEEE 128-bit values by reference. */
+
+#pragma GCC target ("float128-ref,no-float128-vsx")
+
+#ifndef __FLOAT128_REF__
+#define __FLOAT128_REF__
+#endif
+
+#undef __FLOAT128_VSX__
+
+#include "config/rs6000/float128.c"
Index: libgcc/config/rs6000/sfp-machine.h
===================================================================
--- libgcc/config/rs6000/sfp-machine.h
(.../svn+ssh://meiss...@gcc.gnu.org/svn/gcc/trunk) (revision 212529)
+++ libgcc/config/rs6000/sfp-machine.h (working copy)
@@ -1,7 +1,20 @@
+#ifdef _ARCH_PPC64
+#define _FP_W_TYPE_SIZE 64
+#define _FP_W_TYPE unsigned long long
+#define _FP_WS_TYPE signed long long
+#define _FP_I_TYPE long long
+
+typedef int TItype __attribute__ ((mode (TI)));
+typedef unsigned int UTItype __attribute__ ((mode (TI)));
+
+#define TI_BITS (__CHAR_BIT__ * (int)sizeof(TItype))
+
+#else /* 32-bits */
#define _FP_W_TYPE_SIZE 32
-#define _FP_W_TYPE unsigned long
-#define _FP_WS_TYPE signed long
-#define _FP_I_TYPE long
+#define _FP_W_TYPE unsigned int
+#define _FP_WS_TYPE signed int
+#define _FP_I_TYPE int
+#endif /* 32-bits */
/* The type of the result of a floating point comparison. This must
match `__libgcc_cmp_return__' in GCC for the target. */
@@ -12,16 +25,34 @@ typedef int __gcc_CMPtype __attribute__
_FP_MUL_MEAT_1_wide(_FP_WFRACBITS_S,R,X,Y,umul_ppmm)
#define _FP_MUL_MEAT_D(R,X,Y) \
_FP_MUL_MEAT_2_wide(_FP_WFRACBITS_D,R,X,Y,umul_ppmm)
+
+#ifdef _ARCH_PPC64
+#define _FP_MUL_MEAT_Q(R,X,Y) \
+ _FP_MUL_MEAT_2_wide(_FP_WFRACBITS_Q,R,X,Y,umul_ppmm)
+
+#else
#define _FP_MUL_MEAT_Q(R,X,Y) \
_FP_MUL_MEAT_4_wide(_FP_WFRACBITS_Q,R,X,Y,umul_ppmm)
+#endif
#define _FP_DIV_MEAT_S(R,X,Y) _FP_DIV_MEAT_1_loop(S,R,X,Y)
#define _FP_DIV_MEAT_D(R,X,Y) _FP_DIV_MEAT_2_udiv(D,R,X,Y)
+
+#ifdef _ARCH_PPC64
+#define _FP_DIV_MEAT_Q(R,X,Y) _FP_DIV_MEAT_2_udiv(Q,R,X,Y)
+#else
#define _FP_DIV_MEAT_Q(R,X,Y) _FP_DIV_MEAT_4_udiv(Q,R,X,Y)
+#endif
#define _FP_NANFRAC_S ((_FP_QNANBIT_S << 1) - 1)
#define _FP_NANFRAC_D ((_FP_QNANBIT_D << 1) - 1), -1
+
+#ifdef _ARCH_PPC64
+#define _FP_NANFRAC_Q ((_FP_QNANBIT_Q << 1) - 1), -1
+#else
#define _FP_NANFRAC_Q ((_FP_QNANBIT_Q << 1) - 1), -1, -1, -1
+#endif
+
#define _FP_NANSIGN_S 0
#define _FP_NANSIGN_D 0
#define _FP_NANSIGN_Q 0
Index: libgcc/config/rs6000/libgcc-glibc.ver
===================================================================
--- libgcc/config/rs6000/libgcc-glibc.ver
(.../svn+ssh://meiss...@gcc.gnu.org/svn/gcc/trunk) (revision 212529)
+++ libgcc/config/rs6000/libgcc-glibc.ver (working copy)
@@ -71,3 +71,155 @@ GCC_4.2.0 {
__gcc_qunord
%endif
}
+
+# IEEE 128-bit support (__float128) was introduced with GCC 4.10.
+
+%exclude {
+ __addkf3
+ __cmpkf2
+ __divkf3
+ __eqkf2
+ __extenddfkf2
+ __extendkftf2
+ __extendsfkf2
+ __fixkfdi
+ __fixkfsi
+ __fixkfti
+ __fixunskfdi
+ __fixunskfsi
+ __fixunskfti
+ __floattikf
+ __floatuntikf
+ __gekf2
+ __gtkf2
+ __lekf2
+ __ltkf2
+ __mulkf3
+ __negkf3
+ __nekf2
+ __orderedkf2
+ __sqrtkf3
+ __subkf3
+ __trunckfdf2
+ __trunckfsf2
+ __trunctfkf2
+ __uneqkf2
+ __ungekf2
+ __ungtkf2
+ __unlekf2
+ __unltkf2
+ __unordkf2
+ _q_add
+ _q_div
+ _q_dtoq
+ _q_fcmp
+ _q_feq
+ _q_fge
+ _q_fgt
+ _q_fle
+ _q_flt
+ _q_fne
+ _q_fordered
+ _q_funeq
+ _q_funge
+ _q_fungt
+ _q_funle
+ _q_funlt
+ _q_funordered
+ _q_itoq
+ _q_itoq_d
+ _q_itoq_q
+ _q_mul
+ _q_neg
+ _q_qtod
+ _q_qtoi
+ _q_qtoi_d
+ _q_qtoi_q
+ _q_qtos
+ _q_qtot
+ _q_qtou
+ _q_qtou_d
+ _q_qtou_q
+ _q_sqrt
+ _q_stoq
+ _q_sub
+ _q_ttoq
+ _q_utoq
+ _q_utoq_d
+ _q_utoq_q
+}
+
+GCC_4.10.0 {
+ __addkf3
+ __cmpkf2
+ __divkf3
+ __eqkf2
+ __extenddfkf2
+ __extendkftf2
+ __extendsfkf2
+ __fixkfdi
+ __fixkfsi
+ __fixkfti
+ __fixunskfdi
+ __fixunskfsi
+ __fixunskfti
+ __floattikf
+ __floatuntikf
+ __gekf2
+ __gtkf2
+ __lekf2
+ __ltkf2
+ __mulkf3
+ __negkf3
+ __nekf2
+ __orderedkf2
+ __sqrtkf3
+ __subkf3
+ __trunckfdf2
+ __trunckfsf2
+ __trunctfkf2
+ __uneqkf2
+ __ungekf2
+ __ungtkf2
+ __unlekf2
+ __unltkf2
+ __unordkf2
+ _q_add
+ _q_div
+ _q_dtoq
+ _q_fcmp
+ _q_feq
+ _q_fge
+ _q_fgt
+ _q_fle
+ _q_flt
+ _q_fne
+ _q_fordered
+ _q_funeq
+ _q_funge
+ _q_fungt
+ _q_funle
+ _q_funlt
+ _q_funordered
+ _q_itoq
+ _q_itoq_d
+ _q_itoq_q
+ _q_mul
+ _q_neg
+ _q_qtod
+ _q_qtoi
+ _q_qtoi_d
+ _q_qtoi_q
+ _q_qtos
+ _q_qtot
+ _q_qtou
+ _q_qtou_d
+ _q_qtou_q
+ _q_sqrt
+ _q_stoq
+ _q_sub
+ _q_ttoq
+ _q_utoq
+ _q_utoq_d
+ _q_utoq_q
+}
