Moving into own thread from
https://gcc.gnu.org/ml/gcc-patches/2014-06/msg01895.html
This fixes the compilation failures of gcc.target/arm/simd/vexts64_1.c and
gcc.target/arm/simd/vextu64_1.c that I introduced in r by unsharing the test
body on AArch64. (As [u]int64x1_t are vector types on AArch64 but scalar types
on ARM.)
gcc/testsuite/ChangeLog:
* gcc.target/arm/simd/vexts64_1.c: Remove #include, inline test body.
* gcc.target/arm/simd/vextu64_1.c: Likewise.
* gcc.target/aarch64/simd/ext_s64_1.c: Likewise.
* gcc.target/aarch64/simd/ext_u64_1.c: Likewise.
* gcc.target/aarch64/simd/ext_s64.x: Remove.
* gcc.target/aarch64/simd/ext_u64.x: Remove.
On arm-none-eabi
(arm-eabi-aem/-mthumb/-march=armv8-a/-mfpu=crypto-neon-fp-armv8/-mfloat-abi=hard):
FAIL->PASS: gcc.target/arm/simd/vexts64_1.c (test for excess errors)
UNRESOLVED->NA: gcc.target/arm/simd/vexts64_1.c compilation failed to produce
executable
NA->PASS: gcc.target/arm/simd/vexts64_1.c execution test
FAIL->PASS: gcc.target/arm/simd/vextu64_1.c (test for excess errors)
UNRESOLVED->NA: gcc.target/arm/simd/vextu64_1.c compilation failed to produce
executable
NA->PASS: gcc.target/arm/simd/vextu64_1.c execution test
No changes on aarch64-none-elf.
Index: gcc/testsuite/gcc.target/arm/simd/vexts64_1.c
===================================================================
--- gcc/testsuite/gcc.target/arm/simd/vexts64_1.c (revision 211933)
+++ gcc/testsuite/gcc.target/arm/simd/vexts64_1.c (working copy)
@@ -6,7 +6,22 @@
/* { dg-add-options arm_neon } */
#include "arm_neon.h"
-#include "../../aarch64/simd/ext_s64.x"
+extern void abort (void);
+
+int
+main (int argc, char **argv)
+{
+ int64_t arr1[] = {0};
+ int64x1_t in1 = vld1_s64 (arr1);
+ int64_t arr2[] = {1};
+ int64x1_t in2 = vld1_s64 (arr2);
+ int64x1_t actual = vext_s64 (in1, in2, 0);
+ if (actual != in1)
+ abort ();
+
+ return 0;
+}
+
/* Don't scan assembler for vext - it can be optimized into a move from r0. */
/* { dg-final { cleanup-saved-temps } } */
Index: gcc/testsuite/gcc.target/arm/simd/vextu64_1.c
===================================================================
--- gcc/testsuite/gcc.target/arm/simd/vextu64_1.c (revision 211933)
+++ gcc/testsuite/gcc.target/arm/simd/vextu64_1.c (working copy)
@@ -6,7 +6,22 @@
/* { dg-add-options arm_neon } */
#include "arm_neon.h"
-#include "../../aarch64/simd/ext_u64.x"
+extern void abort (void);
+
+int
+main (int argc, char **argv)
+{
+ uint64_t arr1[] = {0};
+ uint64x1_t in1 = vld1_u64 (arr1);
+ uint64_t arr2[] = {1};
+ uint64x1_t in2 = vld1_u64 (arr2);
+ uint64x1_t actual = vext_u64 (in1, in2, 0);
+ if (actual != in1)
+ abort ();
+
+ return 0;
+}
+
/* Don't scan assembler for vext - it can be optimized into a move from r0. */
/* { dg-final { cleanup-saved-temps } } */
Index: gcc/testsuite/gcc.target/aarch64/simd/ext_s64.x
===================================================================
--- gcc/testsuite/gcc.target/aarch64/simd/ext_s64.x (revision 211933)
+++ gcc/testsuite/gcc.target/aarch64/simd/ext_s64.x (working copy)
@@ -1,17 +0,0 @@
-extern void abort (void);
-
-int
-main (int argc, char **argv)
-{
- int i, off;
- int64_t arr1[] = {0};
- int64x1_t in1 = vld1_s64 (arr1);
- int64_t arr2[] = {1};
- int64x1_t in2 = vld1_s64 (arr2);
- int64x1_t actual = vext_s64 (in1, in2, 0);
- if (actual[0] != in1[0])
- abort ();
-
- return 0;
-}
-
Index: gcc/testsuite/gcc.target/aarch64/simd/ext_u64.x
===================================================================
--- gcc/testsuite/gcc.target/aarch64/simd/ext_u64.x (revision 211933)
+++ gcc/testsuite/gcc.target/aarch64/simd/ext_u64.x (working copy)
@@ -1,17 +0,0 @@
-extern void abort (void);
-
-int
-main (int argc, char **argv)
-{
- int i, off;
- uint64_t arr1[] = {0};
- uint64x1_t in1 = vld1_u64 (arr1);
- uint64_t arr2[] = {1};
- uint64x1_t in2 = vld1_u64 (arr2);
- uint64x1_t actual = vext_u64 (in1, in2, 0);
- if (actual[0] != in1[0])
- abort ();
-
- return 0;
-}
-
Index: gcc/testsuite/gcc.target/aarch64/simd/ext_u64_1.c
===================================================================
--- gcc/testsuite/gcc.target/aarch64/simd/ext_u64_1.c (revision 211933)
+++ gcc/testsuite/gcc.target/aarch64/simd/ext_u64_1.c (working copy)
@@ -4,8 +4,23 @@
/* { dg-options "-save-temps -O3 -fno-inline" } */
#include "arm_neon.h"
-#include "ext_u64.x"
+extern void abort (void);
+
+int
+main (int argc, char **argv)
+{
+ uint64_t arr1[] = {0};
+ uint64x1_t in1 = vld1_u64 (arr1);
+ uint64_t arr2[] = {1};
+ uint64x1_t in2 = vld1_u64 (arr2);
+ uint64x1_t actual = vext_u64 (in1, in2, 0);
+ if (actual[0] != in1[0])
+ abort ();
+
+ return 0;
+}
+
/* Do not scan-assembler. An EXT instruction could be emitted, but would merely
return its first argument, so it is legitimate to optimize it out. */
/* { dg-final { cleanup-saved-temps } } */
Index: gcc/testsuite/gcc.target/aarch64/simd/ext_s64_1.c
===================================================================
--- gcc/testsuite/gcc.target/aarch64/simd/ext_s64_1.c (revision 211933)
+++ gcc/testsuite/gcc.target/aarch64/simd/ext_s64_1.c (working copy)
@@ -4,8 +4,23 @@
/* { dg-options "-save-temps -O3 -fno-inline" } */
#include "arm_neon.h"
-#include "ext_s64.x"
+extern void abort (void);
+
+int
+main (int argc, char **argv)
+{
+ int64_t arr1[] = {0};
+ int64x1_t in1 = vld1_s64 (arr1);
+ int64_t arr2[] = {1};
+ int64x1_t in2 = vld1_s64 (arr2);
+ int64x1_t actual = vext_s64 (in1, in2, 0);
+ if (actual[0] != in1[0])
+ abort ();
+
+ return 0;
+}
+
/* Do not scan-assembler. An EXT instruction could be emitted, but would merely
return its first argument, so it is legitimate to optimize it out. */
/* { dg-final { cleanup-saved-temps } } */
