2014-07-02 20:21 GMT+04:00 Andi Kleen <a...@firstfloor.org>: > Ilya Enkovich <enkovich....@gmail.com> writes: > >> Silvermont processors have penalty for instructions having 4+ bytes of >> prefixes (including escape bytes in opcode). This situation happens >> when REX prefix is used in SSE4 instructions. This patch tries to >> avoid such situation by preferring xmm0-xmm7 usage over xmm8-xmm15 in >> those instructions. I achieved it by adding new tuning flag and new >> alternatives affected by tuning. > > Why make it a tuning flag? Shouldn't this help unconditionally for code > size everywhere? Or is there some drawback?
There is already a higher priority for registers not requiring REX. My patch affects cases when compiler has to use xmm8-15 and it just tries to say LRA to assign them for non SSE4 instructions. I doubt it would have some use for other targets than Silvermont. Ilya > > -Andi > > -- > a...@linux.intel.com -- Speaking for myself only
