2014-06-25 16:04 GMT+02:00 Jeff Law <[email protected]>:
> So why is the peephole not working in its current location?
>
> Jeff
Hi Jeff,
that is what I read out of dumps:
If peephole2 is executed early we see following pattern transformation:
(insn 12 11 13 2 (set (reg:CC_NOOV 100 cc)
(compare:CC_NOOV (zero_extract:SI (reg:SI 4 r4 [orig:110 D.1414 ] [110]
)
(const_int 1 [0x1])
(const_int 2 [0x2]))
(const_int 0 [0]))) arm_epilog-1.c:11 84
{*zeroextractsi_compare0_scratch}
(expr_list:REG_DEAD (reg:SI 4 r4 [orig:110 D.1414 ] [110])
(nil)))
(jump_insn 13 12 14 2 (set (pc)
(if_then_else (eq (reg:CC_NOOV 100 cc)
(const_int 0 [0]))
(label_ref:SI 16)
(pc))) arm_epilog-1.c:11 236 {arm_cond_branch}
(expr_list:REG_DEAD (reg:CC_NOOV 100 cc)
(int_list:REG_BR_PROB 3900 (nil)))
-> 16)
which gets replaced to:
(insn 62 11 63 2 (parallel [
(set (reg:CC_NOOV 100 cc)
(compare:CC_NOOV (ashift:SI (reg:SI 4 r4 [orig:110
D.1414 ] [110])
(const_int 29 [0x1d]))
(const_int 0 [0])))
(clobber (reg:SI 4 r4))
]) arm_epilog-1.c:11 -1
(nil))
(jump_insn 63 62 14 2 (set (pc)
(if_then_else (ge (reg:CC_NOOV 100 cc)
(const_int 0 [0]))
(label_ref:SI 16)
(pc))) arm_epilog-1.c:11 -1
(nil)
-> 16)
If we run peephole2 pass late we see instead the following pattern,
which isn't handled by peephole2 pass anymore.
(insn 12 11 15 2 (set (reg:CC_NOOV 100 cc)
(compare:CC_NOOV (zero_extract:SI (reg:SI 4 r4 [orig:110 D.1414 ] [110])
(const_int 1 [0x1])
(const_int 2 [0x2]))
(const_int 0 [0]))) arm_epilog-1_.c:11 84 {*zeroextractsi_compare0_s
cratch}
(expr_list:REG_DEAD (reg:SI 4 r4 [orig:110 D.1414 ] [110])
(nil)))
(insn 15 12 22 2 (cond_exec (ne (reg:CC_NOOV 100 cc)
(const_int 0 [0]))
(set (reg/v:SI 2 r2 [orig:115 c ] [115])
(plus:SI (reg/v:SI 2 r2 [orig:115 c ] [115])
(const_int 1 [0x1])))) arm_epilog-1_.c:11 3229 {*p *arm_addsi3}
(expr_list:REG_DEAD (reg:CC_NOOV 100 cc)
(nil)))
So this issue might be solvable by extending ARM's peephole2 patterns?
An ARM maintainer might be able to tell.
Kai
