On 06/19/2014 11:25 AM, Tom de Vries wrote:
> On 19-06-14 05:53, Richard Henderson wrote:
>> On 06/01/2014 03:00 AM, Tom de Vries wrote:
>>> >+aarch64_emit_call_insn (rtx pat)
>>> >+{
>>> >+ rtx insn = emit_call_insn (pat);
>>> >+
>>> >+ rtx *fusage = &CALL_INSN_FUNCTION_USAGE (insn);
>>> >+ clobber_reg (fusage, gen_rtx_REG (word_mode, IP0_REGNUM));
>>> >+ clobber_reg (fusage, gen_rtx_REG (word_mode, IP1_REGNUM));
>> Actually, I'd like to know more about how this is supposed to work.
>>
>> Why are you only marking the two registers that would be used by a PLT entry,
>> but not those clobbered by the ld.so trampoline, or indeed the unknown
>> function
>> that would be called from the PLT.
>>
>> Oh, I see, looking at the code we do actually follow the cgraph and make sure
>> it is a direct call with a known destination. So, in fact, it's only the
>> registers that could be clobbered by ld branch islands (so these two are
>> still
>> correct for aarch64).
>>
>> This means the documentation is actually wrong when it mentions PLTs at all.
>
> Yes, if we go from the point of view that the
> TARGET_CALL_FUSAGE_CONTAINS_NON_CALLEE_CLOBBERS hooks sole purpose is to
> enable
> the fuse-caller-save optimization.
>
> How about this updated definition ? OK for trunk if re-testing on arm
> succeeds ?
I did like the doc including mention of "stubs", because they're easy to
forget. How about
Set to true if each call that binds to a local definition explicitly clobbers
or sets all non-fixed registers modified by performing the call. That is, by
the call pattern itself, or by code that might be inserted by the linker
(e.g. stubs, veneers, branch islands), but not including those modifiable by
the callee. The affected registers may be mentioned explicitly in the
call pattern, or included as clobbers in CALL_INSN_FUNCTION_USAGE.
The default version of this hook is set to false. The purpose of this hook
is to enable the fuse-caller-save optimization.
r~
