Hi Ramana, FWIW, I have executed the current set of my tests which cover all you changes expect vmul, and I have noticed no regression.
Christophe. 2014-04-28 12:44 GMT+02:00 Ramana Radhakrishnan <ramra...@arm.com>: > I've special cased the ffast-math case for the _f32 intrinsics to prevent > the auto-vectorizer from coming along and vectorizing addv2sf and addv4sf > type operations which we don't want to happen by default. > Patch 1/3 causes apparent "regressions" in the rather ineffective neon > intrinsics tests that we currently carry soon hopefully to be replaced by > Christophe Lyon's rewrite that is being reviewed. On the whole I deem this > patch stack to be safe to go in if necessary. These "regressions" are for > -O0 with the vbic and vorn intrinsics which > don't now get combined and well, so be it. > > > Given we're in stage 1 and that I think we're getting some where > with clyon's testsuite I feel that is reasonably practical in just > carrying the noise with these extra failures. Christophe and I will > testdrive his testsuite work in this space with these patches to see how the > conversion process works and if there are any issues with these patches. > > > <DATE> Ramana Radhakrishnan <ramana.radhakrish...@arm.com> > > * config/arm/arm_neon.h (vadd_s8): GNU C implementation > (vadd_s16): Likewise. > (vadd_s32): Likewise. > (vadd_f32): Likewise. > (vadd_u8): Likewise. > (vadd_u16): Likewise. > (vadd_u32): Likewise. > (vadd_s64): Likewise. > (vadd_u64): Likewise. > (vaddq_s8): Likewise. > (vaddq_s16): Likewise. > (vaddq_s32): Likewise. > (vaddq_s64): Likewise. > (vaddq_f32): Likewise. > (vaddq_u8): Likewise. > (vaddq_u16): Likewise. > (vaddq_u32): Likewise. > (vaddq_u64): Likewise. > (vmul_s8): Likewise. > (vmul_s16): Likewise. > (vmul_s32): Likewise. > (vmul_f32): Likewise. > (vmul_u8): Likewise. > (vmul_u16): Likewise. > (vmul_u32): Likewise. > (vmul_p8): Likewise. > (vmulq_s8): Likewise. > (vmulq_s16): Likewise. > (vmulq_s32): Likewise. > (vmulq_f32): Likewise. > (vmulq_u8): Likewise. > (vmulq_u16): Likewise. > (vmulq_u32): Likewise. > (vsub_s8): Likewise. > (vsub_s16): Likewise. > (vsub_s32): Likewise. > (vsub_f32): Likewise. > (vsub_u8): Likewise. > (vsub_u16): Likewise. > (vsub_u32): Likewise. > (vsub_s64): Likewise. > (vsub_u64): Likewise. > (vsubq_s8): Likewise. > (vsubq_s16): Likewise. > (vsubq_s32): Likewise. > (vsubq_s64): Likewise. > (vsubq_f32): Likewise. > (vsubq_u8): Likewise. > (vsubq_u16): Likewise. > (vsubq_u32): Likewise. > (vsubq_u64): Likewise. > (vand_s8): Likewise. > (vand_s16): Likewise. > (vand_s32): Likewise. > (vand_u8): Likewise. > (vand_u16): Likewise. > (vand_u32): Likewise. > (vand_s64): Likewise. > (vand_u64): Likewise. > (vandq_s8): Likewise. > (vandq_s16): Likewise. > (vandq_s32): Likewise. > (vandq_s64): Likewise. > (vandq_u8): Likewise. > (vandq_u16): Likewise. > (vandq_u32): Likewise. > (vandq_u64): Likewise. > (vorr_s8): Likewise. > (vorr_s16): Likewise. > (vorr_s32): Likewise. > (vorr_u8): Likewise. > (vorr_u16): Likewise. > (vorr_u32): Likewise. > (vorr_s64): Likewise. > (vorr_u64): Likewise. > (vorrq_s8): Likewise. > (vorrq_s16): Likewise. > (vorrq_s32): Likewise. > (vorrq_s64): Likewise. > (vorrq_u8): Likewise. > (vorrq_u16): Likewise. > (vorrq_u32): Likewise. > (vorrq_u64): Likewise. > (veor_s8): Likewise. > (veor_s16): Likewise. > (veor_s32): Likewise. > (veor_u8): Likewise. > (veor_u16): Likewise. > (veor_u32): Likewise. > (veor_s64): Likewise. > (veor_u64): Likewise. > (veorq_s8): Likewise. > (veorq_s16): Likewise. > (veorq_s32): Likewise. > (veorq_s64): Likewise. > (veorq_u8): Likewise. > (veorq_u16): Likewise. > (veorq_u32): Likewise. > (veorq_u64): Likewise. > (vbic_s8): Likewise. > (vbic_s16): Likewise. > (vbic_s32): Likewise. > (vbic_u8): Likewise. > (vbic_u16): Likewise. > (vbic_u32): Likewise. > (vbic_s64): Likewise. > (vbic_u64): Likewise. > (vbicq_s8): Likewise. > (vbicq_s16): Likewise. > (vbicq_s32): Likewise. > (vbicq_s64): Likewise. > (vbicq_u8): Likewise. > (vbicq_u16): Likewise. > (vbicq_u32): Likewise. > (vbicq_u64): Likewise. > (vorn_s8): Likewise. > (vorn_s16): Likewise. > (vorn_s32): Likewise. > (vorn_u8): Likewise. > (vorn_u16): Likewise. > (vorn_u32): Likewise. > (vorn_s64): Likewise. > (vorn_u64): Likewise. > (vornq_s8): Likewise. > (vornq_s16): Likewise. > (vornq_s32): Likewise. > (vornq_s64): Likewise. > (vornq_u8): Likewise. > (vornq_u16): Likewise. > (vornq_u32): Likewise. > (vornq_u64): Likewise. > > > > -- > Ramana Radhakrishnan > Principal Engineer > ARM Ltd.
