slm_cost/intel_cost and TARGET_SLOW_PSHUFB are just preparation to a next vectorization patch. Changes in ix86_add_stmt_cost gives real performance to Silvermont. Let's move all to stage1.
On Wed, Mar 5, 2014 at 9:29 PM, Uros Bizjak <ubiz...@gmail.com> wrote: > On Wed, Mar 5, 2014 at 5:46 PM, H.J. Lu <hjl.to...@gmail.com> wrote: >> On Wed, Mar 5, 2014 at 7:58 AM, Evgeny Stupachenko <evstu...@gmail.com> >> wrote: >>> Hi, >>> >>> The patch is for x86 Silvermont. >>> It improves x86 Silvermont vector cost model. >>> It gives +20% on facerec spec on Silvermont. >>> It passes make check and bootstrap on x86. >>> >>> Is this patch ok for stage1? >>> >>> ChangeLog: >>> >>> 2014-03-05 Evgeny Stupachenko <evstu...@gmail.com> >>> >>> * config/i386/x86-tune.def (TARGET_SLOW_PSHUFB): Target for slow byte >>> shuffle on some x86 architectures. >>> * config/i386/i386.h (TARGET_SLOW_PSHUFB): Ditto. >>> * config/i386/i386.c (processor_costs): Fixing vec_to_scalar_cost for >>> Silvermont according latency table. >>> (expand_vec_perm_even_odd_1): Avoid byte shuffles in architectures >>> where they are slow (TARGET_SLOW_PSHUFB). >>> (x86_add_stmt_cost): Fixing vector cost model for Silvermont. >>> >>> Thanks, >>> Evgeny >> >> There are 3 separate changes in this patch: >> >> 1. Update slm_cost, which doesn't have a ChangeLog entry. >> 2. Add TARGET_SLOW_PSHUFB. >> 3. Update ix86_add_stmt_cost. >> >> I suggest you break it into 3 independent patches. > > I think that slm_cost/intel_cost and TARGET_SLOW_PSHUFB changes can > still go into mainline at this stage since they are trivial tuning > changes that should not destabilize the compiler. > > The ix86_add_stmt_cost should wait for stage 1. > > Uros.
