This small patch lets GCC emit a single unaligned load/store instruction for m_GENERIC i386 CPUs.
Bootstrapped and passed regression test. OK for Google branch? thanks, Cong Index: gcc/config/i386/i386.c =================================================================== --- gcc/config/i386/i386.c (revision 207701) +++ gcc/config/i386/i386.c (working copy) @@ -1903,10 +1903,10 @@ static unsigned int initial_ix86_tune_fe m_PPRO | m_P4_NOCONA | m_CORE_ALL | m_ATOM | m_AMDFAM10 | m_BDVER | m_GENERIC, /* X86_TUNE_SSE_UNALIGNED_LOAD_OPTIMAL */ - m_COREI7 | m_COREI7_AVX | m_AMDFAM10 | m_BDVER | m_BTVER, + m_COREI7 | m_COREI7_AVX | m_AMDFAM10 | m_BDVER | m_BTVER | m_GENERIC, /* X86_TUNE_SSE_UNALIGNED_STORE_OPTIMAL */ - m_COREI7 | m_COREI7_AVX | m_BDVER, + m_COREI7 | m_COREI7_AVX | m_BDVER | m_GENERIC, /* X86_TUNE_SSE_PACKED_SINGLE_INSN_OPTIMAL */ m_BDVER ,
