Hi,
This patch turns off the vec_perm patterns for aarch64_be, this should
resolve
the issue highlighted here
http://gcc.gnu.org/ml/gcc-patches/2014-01/msg00321.html
With this patch applied, the test case provided in that link compiles
without an ICE.
However, the Big-Endian port is still in development. This patch exposes
another known but unrelated issue with Big-Endian Large-Int modes.
The patch has been tested on aarch64-none-elf and aarch64_be-none-elf
resulting in five
further regression due to the broken implementation of Big-Endian
Large-Int modes.
Kind regards,
Alex Velenko
gcc/
2014-01-14 Alex Velenko <alex.vele...@arm.com>
* config/aarch64/aarch64-simd.md (vec_perm<mode>): Add BE check.
* config/aarch64/aarch64.c (aarch64_expand_vec_perm): Add comment.
gcc/testsuite/
2014-01-14 Alex Velenko <alex.vele...@arm.com>
* lib/target-supports.exp
(check_effective_target_vect_perm): Exclude aarch64_be.
(check_effective_target_vect_perm_byte): Likewise.
(check_effective_target_vect_perm_short): Likewise.
diff --git a/gcc/config/aarch64/aarch64-simd.md b/gcc/config/aarch64/aarch64-simd.md
index bc47a291de4b9b24d829e4dbf060fff7a321558f..43a9c5b27d78a47cf965636a03232005a4c8e7c3 100644
--- a/gcc/config/aarch64/aarch64-simd.md
+++ b/gcc/config/aarch64/aarch64-simd.md
@@ -3840,7 +3840,7 @@
(match_operand:VB 1 "register_operand")
(match_operand:VB 2 "register_operand")
(match_operand:VB 3 "register_operand")]
- "TARGET_SIMD"
+ "TARGET_SIMD && !BYTES_BIG_ENDIAN"
{
aarch64_expand_vec_perm (operands[0], operands[1],
operands[2], operands[3]);
diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp
index 95360089b89d5fef2997dc6dbe7f47a6864143ea..084668af5124aa1c4a7f25495cf44b52811d0e62 100644
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -3417,7 +3417,8 @@ proc check_effective_target_vect_perm { } {
} else {
set et_vect_perm_saved 0
if { [is-effective-target arm_neon_ok]
- || [istarget aarch64*-*-*]
+ || ([istarget aarch64*-*-*]
+ && ![istarget aarch64_be*-*-*])
|| [istarget powerpc*-*-*]
|| [istarget spu-*-*]
|| [istarget i?86-*-*]
@@ -3445,7 +3446,8 @@ proc check_effective_target_vect_perm_byte { } {
set et_vect_perm_byte_saved 0
if { ([is-effective-target arm_neon_ok]
&& [is-effective-target arm_little_endian])
- || [istarget aarch64*-*-*]
+ || ([istarget aarch64*-*-*]
+ && ![istarget aarch64_be*-*-*])
|| [istarget powerpc*-*-*]
|| [istarget spu-*-*] } {
set et_vect_perm_byte_saved 1
@@ -3469,7 +3471,8 @@ proc check_effective_target_vect_perm_short { } {
set et_vect_perm_short_saved 0
if { ([is-effective-target arm_neon_ok]
&& [is-effective-target arm_little_endian])
- || [istarget aarch64*-*-*]
+ || ([istarget aarch64*-*-*]
+ && ![istarget aarch64_be*-*-*])
|| [istarget powerpc*-*-*]
|| [istarget spu-*-*] } {
set et_vect_perm_short_saved 1
