Hi all,
The Cortex-A53 and Cortex-A57 processors support the CRC32 extensions to
ARMv8-a, so we specify that in their definitions in arm-cores.def.
This also updates their big.LITTLE amalgamation and removes the redundant
FL_THUMB_DIV and FL_ARM_DIV there since ARMv8-a already implies those flags.
Tested arm-none-eabi on a model.
Ok for trunk?
2014-01-09 Kyrylo Tkachov <kyrylo.tkac...@arm.com>
* config/arm/arm-cores.def (cortex-a53): Specify FL_CRC32.
(cortex-a57): Likewise.
(cortex-a57.cortex-a53): Likewise. Remove redundant flags.diff --git a/gcc/config/arm/arm-cores.def b/gcc/config/arm/arm-cores.def
index d961e25..1e97273 100644
--- a/gcc/config/arm/arm-cores.def
+++ b/gcc/config/arm/arm-cores.def
@@ -152,8 +152,8 @@ ARM_CORE("marvell-pj4", marvell_pj4,
marvell_pj4, 7A, FL_LDSCHED, 9e)
ARM_CORE("cortex-a15.cortex-a7", cortexa15cortexa7, cortexa7, 7A, FL_LDSCHED
| FL_THUMB_DIV | FL_ARM_DIV, cortex_a15)
/* V8 Architecture Processors */
-ARM_CORE("cortex-a53", cortexa53, cortexa53, 8A, FL_LDSCHED, cortex_a53)
-ARM_CORE("cortex-a57", cortexa57, cortexa15, 8A, FL_LDSCHED, cortex_a15)
+ARM_CORE("cortex-a53", cortexa53, cortexa53, 8A, FL_LDSCHED | FL_CRC32,
cortex_a53)
+ARM_CORE("cortex-a57", cortexa57, cortexa15, 8A, FL_LDSCHED | FL_CRC32,
cortex_a15)
/* V8 big.LITTLE implementations */
-ARM_CORE("cortex-a57.cortex-a53", cortexa57cortexa53, cortexa53, 8A,
FL_LDSCHED | FL_THUMB_DIV | FL_ARM_DIV, cortex_a15)
+ARM_CORE("cortex-a57.cortex-a53", cortexa57cortexa53, cortexa53, 8A,
FL_LDSCHED | FL_CRC32, cortex_a15)
