On Fri, Nov 29, 2013 at 01:36:48PM +0100, Richard Biener wrote:
> > Thoughts, comments? Does anyone have a good name for these accelerator
> > targets or output targets, something that avoids the overloaded word
> > "target" (I was thinking "destination machine" maybe)?
I think offload is best word here.
> Note that we (SUSE/AMD) sofar think we can go an easier route, not
> adding a real backend that targets HSAIL/BRIG but instead use a
> custom GIMPLE SSA -> HSAIL/BRIG translator (including a SSA
> based register allocator). Which if course simplifies driving this a bit
> as we don't need to write/read any GIMPLE.
>
> The idea is of course that the "highlevel" target languages, being it
> HSAIL/BRIG or PTX run through another compiler + optimizer anyway,
> so machine specific optimization is not necessary (fingers crossing...).
>
> Not sure if anybody announced it yet (but gcc-cvs readers may have
> noticed), there is a 'hsa' branch in svn covering work done sofar
> (see gcc/README.hsa for how to use it).
But you probably don't want to translate GIMPLE right out of IPA into
HSAIL/BRIG, do you? And various further passes depend already (well, also
the early ones a little bit, but that is something to fix) heavily on
targetm.* and target macros, so do you plan to switch targetm to something
else and compile again a subset of functions for the HSAIL target?
Otherwise, how could you e.g. vectorize code (assuming HSAIL has vector
support)?
Jakub
