> It looks like this patch was for gcc-4.8; the code has changed a little > since then.
Well, the baseline is: eric@polaris:~/build/gcc/native> gcc/xgcc -v Using built-in specs. COLLECT_GCC=gcc/xgcc Target: x86_64-suse-linux Configured with: /home/eric/svn/gcc/configure --build=x86_64-suse-linux -- prefix=/home/eric/install/gcc --enable-languages=c,c++,objc,obj- c++,java,fortran,ada --enable-checking=yes,rtl --enable-__cxa_atexit -- disable-nls Thread model: posix gcc version 4.9.0 20131122 (experimental) [trunk revision 205244] (GCC) > I'm having a hard time seeing why this change was made: > > /* Optimize the access just a bit. */ > - if (MEM_P (dest) > - && (! SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (dest)) > - || MEM_ALIGN (dest) >= GET_MODE_ALIGNMENT (mode)) > - && bytepos * BITS_PER_UNIT % GET_MODE_ALIGNMENT (mode) == 0 > - && bytelen == GET_MODE_SIZE (mode)) > + else if (MEM_P (dest) > + && (!SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (dest)) > + || MEM_ALIGN (dest) >= GET_MODE_ALIGNMENT (mode)) > + && bytepos * BITS_PER_UNIT % GET_MODE_ALIGNMENT (mode) == 0 > + && bytelen == GET_MODE_SIZE (mode)) > emit_move_insn (adjust_address (dest, mode, bytepos), tmps[i]); Because we're adding a call to store_bit_field and don't want to store twice. -- Eric Botcazou
