On 18/11/13 20:19, Cong Hou wrote: > On Fri, Nov 15, 2013 at 10:18 AM, Richard Earnshaw <rearn...@arm.com> wrote: >> On 15/11/13 02:06, Cong Hou wrote: >>> Hi >>> >>> This patch adds the support to two non-isomorphic operations addsub >>> and subadd for SLP vectorizer. More non-isomorphic operations can be >>> added later, but the limitation is that operations on even/odd >>> elements should still be isomorphic. Once such an operation is >>> detected, the code of the operation used in vectorized code is stored >>> and later will be used during statement transformation. Two new GIMPLE >>> opeartions VEC_ADDSUB_EXPR and VEC_SUBADD_EXPR are defined. And also >>> new optabs for them. They are also documented. >>> >> >> Not withstanding what Richi has already said on this subject, you >> certainly don't need both VEC_ADDSUB_EXPR and VEC_SUBADD_EXPR. The >> latter can always be formed by vec-negating the second operand and >> passing it to VEC_ADDSUB_EXPR. >> > > Right. But I also considered targets without the support to addsub > instructions. Then we could still selectively negate odd/even elements > using masks then use PLUS_EXPR (at most 2 instructions). If I > implement VEC_ADDSUB_EXPR by negating the second operand then using > VEC_ADDSUB_EXPR, I end up with one more instruction. > >
No, you don't, since as Richi has mentioned elsewhere, two RTL operations in a single pattern doesn't imply two instructions. R.
