> Sometimes 4 will be needed, since both original register values may
> remain live.

Indeed.

> However, I'm inclined to agree that while it should be possible to
> decide at the *function* level whether or not an insn is valid, doing so
> at the block level is probably unsafe.

Ok, so the attached patch should fix the issue, its validation is ongoing.
diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md
index e8d5464..da387fb 100644
--- a/gcc/config/arm/arm.md
+++ b/gcc/config/arm/arm.md
@@ -3642,7 +3642,7 @@
         [(match_operand:SI 1 "s_register_operand" "r")
          (match_operand:SI 2 "s_register_operand" "r")]))
    (clobber (reg:CC CC_REGNUM))]
-  "TARGET_32BIT && optimize_insn_for_size_p()"
+  "TARGET_32BIT && optimize_function_for_size_p (cfun)"
   "*
   operands[3] = gen_rtx_fmt_ee (minmax_code (operands[3]), SImode,
                                operands[1], operands[2]);

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