--- gcc/expmed.c.jj 2013-10-31 20:06:49.000000000 +0100 +++ gcc/expmed.c 2013-11-14 10:38:04.603220474 +0100 @@ -415,6 +415,53 @@ lowpart_bit_field_p (unsigned HOST_WIDE_ return bitnum % BITS_PER_WORD == 0; } +/* Return true if -fstrict-volatile-bitfields applies an access of OP0 + containing BITSIZE bits starting at BITNUM, with field mode FIELDMODE. + Return false if the access would touch memory outside the range + BITREGION_START to BITREGION_END for conformance to the C++ memory + model. */ + +static bool +strict_volatile_bitfield_p (rtx op0, unsigned HOST_WIDE_INT bitsize, + unsigned HOST_WIDE_INT bitnum, + enum machine_mode fieldmode, + unsigned HOST_WIDE_INT bitregion_start, + unsigned HOST_WIDE_INT bitregion_end) +{ + unsigned HOST_WIDE_INT modesize = GET_MODE_BITSIZE (fieldmode); + + /* -fstrict-volatile-bitfields must be enabled and we must have a + volatile MEM. */ + if (!MEM_P (op0) + || !MEM_VOLATILE_P (op0) + || flag_strict_volatile_bitfields <= 0) + return false; + + /* Non-integral modes likely only happen with packed structures. + Punt. */ + if (!SCALAR_INT_MODE_P (fieldmode)) + return false; + + /* The bit size must not be larger than the field mode, and + the field mode must not be larger than a word. */ + if (bitsize > modesize || modesize > BITS_PER_WORD) + return false; + + /* Check for cases of unaligned fields that must be split. */ + if (bitnum % BITS_PER_UNIT + bitsize > modesize + || (STRICT_ALIGNMENT + && bitnum % GET_MODE_ALIGNMENT (fieldmode) + bitsize > modesize)) + return false; + + /* Check for cases where the C++ memory model applies. */ + if (bitregion_end != 0 + && (bitnum - bitnum % modesize < bitregion_start + || bitnum - bitnum % modesize + modesize > bitregion_end)) + return false; + + return true; +} + /* Return true if OP is a memory and if a bitfield of size BITSIZE at bit number BITNUM can be treated as a simple value of mode MODE. */ @@ -828,12 +875,8 @@ store_bit_field_1 (rtx str_rtx, unsigned cheap register alternative is available. */ if (MEM_P (op0)) { - /* Do not use unaligned memory insvs for volatile bitfields when - -fstrict-volatile-bitfields is in effect. */ - if (!(MEM_VOLATILE_P (op0) - && flag_strict_volatile_bitfields > 0) - && get_best_mem_extraction_insn (&insv, EP_insv, bitsize, bitnum, - fieldmode) + if (get_best_mem_extraction_insn (&insv, EP_insv, bitsize, bitnum, + fieldmode) && store_bit_field_using_insv (&insv, op0, bitsize, bitnum, value)) return true; @@ -886,6 +929,36 @@ store_bit_field (rtx str_rtx, unsigned H enum machine_mode fieldmode, rtx value) { + /* Handle -fstrict-volatile-bitfields in the cases where it applies. */ + if (strict_volatile_bitfield_p (str_rtx, bitsize, bitnum, fieldmode, + bitregion_start, bitregion_end)) + { + + /* Storing any naturally aligned field can be done with a simple + store. For targets that support fast unaligned memory, any + naturally sized, unit aligned field can be done directly. */ + if (simple_mem_bitfield_p (str_rtx, bitsize, bitnum, fieldmode)) + { + str_rtx = adjust_bitfield_address (str_rtx, fieldmode, + bitnum / BITS_PER_UNIT); + emit_move_insn (str_rtx, value); + } + else + /* Explicitly override the C/C++ memory model; ignore the + bit range so that we can do the access in the mode mandated + by -fstrict-volatile-bitfields instead. */ + store_fixed_bit_field (str_rtx, bitsize, bitnum, 0, 0, value); + return; + } + else if (MEM_P (str_rtx) + && MEM_VOLATILE_P (str_rtx) + && flag_strict_volatile_bitfields > 0) + /* This is a case where -fstrict-volatile-bitfields doesn't apply + because we can't do a single access in the declared mode of the field. + Since the incoming STR_RTX has already been adjusted to that mode, + fall back to word mode for subsequent logic. */ + str_rtx = adjust_address (str_rtx, word_mode, 0); + /* Under the C++0x memory model, we must not touch bits outside the bit region. Adjust the address to start at the beginning of the bit region. */ @@ -938,29 +1011,12 @@ store_fixed_bit_field (rtx op0, unsigned if (MEM_P (op0)) { - unsigned HOST_WIDE_INT maxbits = MAX_FIXED_MODE_SIZE; - - if (bitregion_end) - maxbits = bitregion_end - bitregion_start + 1; - - /* Get the proper mode to use for this field. We want a mode that - includes the entire field. If such a mode would be larger than - a word, we won't be doing the extraction the normal way. - We don't want a mode bigger than the destination. */ - mode = GET_MODE (op0); if (GET_MODE_BITSIZE (mode) == 0 || GET_MODE_BITSIZE (mode) > GET_MODE_BITSIZE (word_mode)) mode = word_mode; - - if (MEM_VOLATILE_P (op0) - && GET_MODE_BITSIZE (GET_MODE (op0)) > 0 - && GET_MODE_BITSIZE (GET_MODE (op0)) <= maxbits - && flag_strict_volatile_bitfields > 0) - mode = GET_MODE (op0); - else - mode = get_best_mode (bitsize, bitnum, bitregion_start, bitregion_end, - MEM_ALIGN (op0), mode, MEM_VOLATILE_P (op0)); + mode = get_best_mode (bitsize, bitnum, bitregion_start, bitregion_end, + MEM_ALIGN (op0), mode, MEM_VOLATILE_P (op0)); if (mode == VOIDmode) { @@ -1444,19 +1500,8 @@ extract_bit_field_1 (rtx str_rtx, unsign If that's wrong, the solution is to test for it and set TARGET to 0 if needed. */ - /* If the bitfield is volatile, we need to make sure the access - remains on a type-aligned boundary. */ - if (GET_CODE (op0) == MEM - && MEM_VOLATILE_P (op0) - && GET_MODE_BITSIZE (GET_MODE (op0)) > 0 - && flag_strict_volatile_bitfields > 0) - goto no_subreg_mode_swap; - - /* Only scalar integer modes can be converted via subregs. There is an - additional problem for FP modes here in that they can have a precision - which is different from the size. mode_for_size uses precision, but - we want a mode based on the size, so we must avoid calling it for FP - modes. */ + /* Get the mode of the field to use for atomic access or subreg + conversion. */ mode1 = mode; if (SCALAR_INT_MODE_P (tmode)) { @@ -1489,8 +1534,6 @@ extract_bit_field_1 (rtx str_rtx, unsign return convert_extracted_bit_field (op0, mode, tmode, unsignedp); } - no_subreg_mode_swap: - /* Handle fields bigger than a word. */ if (bitsize > BITS_PER_WORD) @@ -1610,11 +1653,8 @@ extract_bit_field_1 (rtx str_rtx, unsign cheap register alternative is available. */ if (MEM_P (op0)) { - /* Do not use extv/extzv for volatile bitfields when - -fstrict-volatile-bitfields is in effect. */ - if (!(MEM_VOLATILE_P (op0) && flag_strict_volatile_bitfields > 0) - && get_best_mem_extraction_insn (&extv, pattern, bitsize, bitnum, - tmode)) + if (get_best_mem_extraction_insn (&extv, pattern, bitsize, bitnum, + tmode)) { rtx result = extract_bit_field_using_extv (&extv, op0, bitsize, bitnum, unsignedp, @@ -1680,6 +1720,39 @@ extract_bit_field (rtx str_rtx, unsigned unsigned HOST_WIDE_INT bitnum, int unsignedp, rtx target, enum machine_mode mode, enum machine_mode tmode) { + enum machine_mode mode1; + + /* Handle -fstrict-volatile-bitfields in the cases where it applies. */ + if (GET_MODE_BITSIZE (GET_MODE (str_rtx)) > 0) + mode1 = GET_MODE (str_rtx); + else if (target && GET_MODE_BITSIZE (GET_MODE (target)) > 0) + mode1 = GET_MODE (target); + else + mode1 = tmode; + + if (strict_volatile_bitfield_p (str_rtx, bitsize, bitnum, mode1, 0, 0)) + { + rtx result; + + /* Extraction of a full MODE1 value can be done with a load as long as + the field is on a byte boundary and is sufficiently aligned. */ + if (simple_mem_bitfield_p (str_rtx, bitsize, bitnum, mode1)) + result = adjust_bitfield_address (str_rtx, mode1, + bitnum / BITS_PER_UNIT); + else + result = extract_fixed_bit_field (mode, str_rtx, bitsize, bitnum, + target, unsignedp); + return convert_extracted_bit_field (result, mode, tmode, unsignedp); + } + else if (MEM_P (str_rtx) + && MEM_VOLATILE_P (str_rtx) + && flag_strict_volatile_bitfields > 0) + /* This is a case where -fstrict-volatile-bitfields doesn't apply + because we can't do a single access in the declared mode of the field. + Since the incoming STR_RTX has already been adjusted to that mode, + fall back to word mode for subsequent logic. */ + str_rtx = adjust_address (str_rtx, word_mode, 0); + return extract_bit_field_1 (str_rtx, bitsize, bitnum, unsignedp, target, mode, tmode, true); } @@ -1706,45 +1779,19 @@ extract_fixed_bit_field (enum machine_mo includes the entire field. If such a mode would be larger than a word, we won't be doing the extraction the normal way. */ - if (MEM_VOLATILE_P (op0) - && flag_strict_volatile_bitfields > 0) - { - if (GET_MODE_BITSIZE (GET_MODE (op0)) > 0) - mode = GET_MODE (op0); - else if (target && GET_MODE_BITSIZE (GET_MODE (target)) > 0) - mode = GET_MODE (target); - else - mode = tmode; - } - else - mode = get_best_mode (bitsize, bitnum, 0, 0, - MEM_ALIGN (op0), word_mode, MEM_VOLATILE_P (op0)); + mode = GET_MODE (op0); + if (GET_MODE_BITSIZE (mode) == 0 + || GET_MODE_BITSIZE (mode) > GET_MODE_BITSIZE (word_mode)) + mode = word_mode; + mode = get_best_mode (bitsize, bitnum, 0, 0, + MEM_ALIGN (op0), mode, MEM_VOLATILE_P (op0)); if (mode == VOIDmode) /* The only way this should occur is if the field spans word boundaries. */ return extract_split_bit_field (op0, bitsize, bitnum, unsignedp); - unsigned int total_bits = GET_MODE_BITSIZE (mode); - HOST_WIDE_INT bit_offset = bitnum - bitnum % total_bits; - - /* If we're accessing a volatile MEM, we can't apply BIT_OFFSET - if it results in a multi-word access where we otherwise wouldn't - have one. So, check for that case here. */ - if (MEM_P (op0) - && MEM_VOLATILE_P (op0) - && flag_strict_volatile_bitfields > 0 - && bitnum % BITS_PER_UNIT + bitsize <= total_bits - && bitnum % GET_MODE_BITSIZE (mode) + bitsize > total_bits) - { - /* If the target doesn't support unaligned access, give up and - split the access into two. */ - if (STRICT_ALIGNMENT) - return extract_split_bit_field (op0, bitsize, bitnum, unsignedp); - bit_offset = bitnum - bitnum % BITS_PER_UNIT; - } - op0 = adjust_bitfield_address (op0, mode, bit_offset / BITS_PER_UNIT); - bitnum -= bit_offset; + op0 = narrow_bit_field_mem (op0, mode, bitsize, bitnum, &bitnum); } mode = GET_MODE (op0);