Ping?
On Oct 18, 2013, at 10:03 AM, Mike Stump <[email protected]> wrote:
> On Oct 18, 2013, at 4:24 AM, Richard Biener <[email protected]>
> wrote:
>> I agree. Btw, the "implementation defined" precision of PDI on SH-5
>> definitely
>> looks interesting, but I wonder how you can perform "implementation defined"
>> arithmetic on that PDI mode then ;)
>
> Easy, perform it in the maximal size supported…
>
>> What else blocks this patch?
>
> Nothing. We have heard from everyone, and all the issues found by testing
> were on msp, and those were exclusively due to port issues that I believe now
> have been resolved. The below patch has the change to 22 bits for PSI on SH.
>
> Ok?
>
Index: gcc/config/msp430/msp430-modes.def
===================================================================
--- gcc/config/msp430/msp430-modes.def (revision 202634)
+++ gcc/config/msp430/msp430-modes.def (working copy)
@@ -1,3 +1,3 @@
/* 20-bit address */
-PARTIAL_INT_MODE (SI);
+PARTIAL_INT_MODE_NAME (SI, 20, PSI);
Index: gcc/config/bfin/bfin-modes.def
===================================================================
--- gcc/config/bfin/bfin-modes.def (revision 202634)
+++ gcc/config/bfin/bfin-modes.def (working copy)
@@ -19,7 +19,7 @@
<http://www.gnu.org/licenses/>. */
/* PDImode for the 40-bit accumulators. */
-PARTIAL_INT_MODE (DI);
+PARTIAL_INT_MODE_NAME (DI, 40, PDI);
/* Two of those - covering both accumulators for vector multiplications. */
VECTOR_MODE (INT, PDI, 2);
Index: gcc/config/m32c/m32c-modes.def
===================================================================
--- gcc/config/m32c/m32c-modes.def (revision 202634)
+++ gcc/config/m32c/m32c-modes.def (working copy)
@@ -22,7 +22,7 @@
/*INT_MODE (PI, 3);*/
/* 24-bit pointers, in 32-bit units */
-PARTIAL_INT_MODE (SI);
+PARTIAL_INT_MODE_NAME (SI, 24, PSI);
/* 48-bit MULEX result */
/* INT_MODE (MI, 6); */
Index: gcc/config/rs6000/rs6000-modes.def
===================================================================
--- gcc/config/rs6000/rs6000-modes.def (revision 202634)
+++ gcc/config/rs6000/rs6000-modes.def (working copy)
@@ -45,4 +45,4 @@ VECTOR_MODES (FLOAT, 32); /* V
/* Replacement for TImode that only is allowed in GPRs. We also use PTImode
for quad memory atomic operations to force getting an even/odd register
combination. */
-PARTIAL_INT_MODE (TI);
+PARTIAL_INT_MODE_NAME (TI, 128, PTI);
Index: gcc/config/sh/sh-modes.def
===================================================================
--- gcc/config/sh/sh-modes.def (revision 202634)
+++ gcc/config/sh/sh-modes.def (working copy)
@@ -18,9 +18,9 @@ along with GCC; see the file COPYING3.
<http://www.gnu.org/licenses/>. */
/* The SH uses a partial integer mode to represent the FPSCR register. */
-PARTIAL_INT_MODE (SI);
+PARTIAL_INT_MODE_NAME (SI, 22, PSI);
/* PDI mode is used to represent a function address in a target register. */
-PARTIAL_INT_MODE (DI);
+PARTIAL_INT_MODE_NAME (DI, 64, PDI);
/* Vector modes. */
VECTOR_MODE (INT, QI, 2); /* V2QI */
Index: gcc/genmodes.c
===================================================================
--- gcc/genmodes.c (revision 202634)
+++ gcc/genmodes.c (working copy)
@@ -629,10 +629,14 @@ reset_float_format (const char *name, co
m->format = format;
}
-/* Partial integer modes are specified by relation to a full integer mode.
- For now, we do not attempt to narrow down their bit sizes. */
-#define PARTIAL_INT_MODE(M) \
- make_partial_integer_mode (#M, "P" #M, -1U, __FILE__, __LINE__)
+/* Partial integer modes are specified by relation to a full integer
+ mode. */
+#define PARTIAL_INT_MODE(M,PREC) \
+ make_partial_integer_mode (#M, "P" #PREC #M, PREC, __FILE__, __LINE__)
+/* Partial integer modes are specified by relation to a full integer
+ mode. */
+#define PARTIAL_INT_MODE_NAME(M,PREC,NAME) \
+ make_partial_integer_mode (#M, #NAME, PREC, __FILE__, __LINE__)
static void ATTRIBUTE_UNUSED
make_partial_integer_mode (const char *base, const char *name,
unsigned int precision,
@@ -669,7 +673,7 @@ make_vector_mode (enum mode_class bclass
struct mode_data *v;
enum mode_class vclass = vector_class (bclass);
struct mode_data *component = find_mode (base);
- char namebuf[8];
+ char namebuf[16];
if (vclass == MODE_RANDOM)
return;
@@ -917,7 +921,7 @@ enum machine_mode\n{");
end will try to use it for bitfields in structures and the
like, which we do not want. Only the target md file should
generate BImode widgets. */
- if (first && first->precision == 1)
+ if (first && first->precision == 1 && c == MODE_INT)
first = first->next;
if (first && last)
@@ -1187,7 +1191,7 @@ emit_class_narrowest_mode (void)
/* Bleah, all this to get the comment right for MIN_MODE_INT. */
tagged_printf ("MIN_%s", mode_class_names[c],
modes[c]
- ? (modes[c]->precision != 1
+ ? ((c != MODE_INT || modes[c]->precision != 1)
? modes[c]->name
: (modes[c]->next
? modes[c]->next->name
Index: gcc/machmode.def
===================================================================
--- gcc/machmode.def (revision 202634)
+++ gcc/machmode.def (working copy)
@@ -121,11 +121,17 @@ along with GCC; see the file COPYING3.
to FORMAT. Use in an ARCH-modes.def to reset the format
of one of the float modes defined in this file.
- PARTIAL_INT_MODE (MODE);
+ PARTIAL_INT_MODE (MODE, PRECISION);
declares a mode of class PARTIAL_INT with the same size as
- MODE (which must be an INT mode). The name of the new mode
- is made by prefixing a P to the name MODE. This statement
- may grow a PRECISION argument in the future.
+ MODE (which must be an INT mode) and precision PREC.
+ Optionally, NAME is the new name of the mode. The name of the
+ new mode is made by prefixing a P and the precision to the
+ name MODE.
+
+ PARTIAL_INT_MODE_NAME (MODE, PRECISION, NAME);
+ declares a mode of class PARTIAL_INT with the same size as
+ MODE (which must be an INT mode) and precision PREC.
+ Optionally, NAME is the new name of the mode.
VECTOR_MODE (CLASS, MODE, COUNT);
Declare a vector mode whose component mode is MODE (of class
