Hi all,
This patch splits the r/rI alternative in arm_cmpsi_insn so as to
better specify the "type" attribute. Also, the predicable_short_it
attribute is set properly to conform to the -mrestrict-it rules.
A nearby pattern has a redundant "%?" removed.
Tested arm-none-eabi on a model and bootstrapped on Chromebook.
Ok for trunk?
Thanks,
Kyrill
2013-09-13 Kyrylo Tkachov <kyrylo.tkac...@arm.com>
* config/arm/arm.md (arm_cmpsi_insn): Split rI alternative.
Set type attribute correctly. Set predicable_short_it attribute.
(cmpsi_shiftsi): Remove %? from output template.diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md
index 423d535bfc63d8db75f233a9a73aaf23d1e83108..0000000000000000000000000000000000000000 100644
--- a/gcc/config/arm/arm.md
+++ b/gcc/config/arm/arm.md
@@ -8194,19 +8194,21 @@ (define_insn "*addsi3_cbranch_scratch"
(define_insn "*arm_cmpsi_insn"
[(set (reg:CC CC_REGNUM)
- (compare:CC (match_operand:SI 0 "s_register_operand" "l,r,r,r")
- (match_operand:SI 1 "arm_add_operand" "Py,r,rI,L")))]
+ (compare:CC (match_operand:SI 0 "s_register_operand" "l,r,r,r,r")
+ (match_operand:SI 1 "arm_add_operand" "Py,r,r,I,L")))]
"TARGET_32BIT"
"@
cmp%?\\t%0, %1
cmp%?\\t%0, %1
cmp%?\\t%0, %1
+ cmp%?\\t%0, %1
cmn%?\\t%0, #%n1"
[(set_attr "conds" "set")
- (set_attr "arch" "t2,t2,any,any")
- (set_attr "length" "2,2,4,4")
+ (set_attr "arch" "t2,t2,any,any,any")
+ (set_attr "length" "2,2,4,4,4")
(set_attr "predicable" "yes")
- (set_attr "type" "*,*,*,arlo_imm")]
+ (set_attr "predicable_short_it" "yes,yes,yes,no,no")
+ (set_attr "type" "arlo_imm,*,*,arlo_imm,arlo_imm")]
)
(define_insn "*cmpsi_shiftsi"
@@ -8216,7 +8218,7 @@ (define_insn "*cmpsi_shiftsi"
[(match_operand:SI 1 "s_register_operand" "r,r")
(match_operand:SI 2 "shift_amount_operand" "M,rM")])))]
"TARGET_32BIT"
- "cmp%?\\t%0, %1%S3"
+ "cmp\\t%0, %1%S3"
[(set_attr "conds" "set")
(set_attr "shift" "1")
(set_attr "arch" "32,a")
