diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md
index 8e60d08..12a6e87 100644
--- a/gcc/config/arm/arm.md
+++ b/gcc/config/arm/arm.md
@@ -4169,18 +4169,18 @@
 )
 
 (define_insn "*arm_shiftsi3"
-  [(set (match_operand:SI   0 "s_register_operand" "=l,r,r")
+  [(set (match_operand:SI   0 "s_register_operand" "=l,l,r,r")
 	(match_operator:SI  3 "shift_operator"
-	 [(match_operand:SI 1 "s_register_operand"  "0,r,r")
-	  (match_operand:SI 2 "reg_or_int_operand" "l,M,r")]))]
+	 [(match_operand:SI 1 "s_register_operand"  "0,l,r,r")
+	  (match_operand:SI 2 "reg_or_int_operand" "l,N,M,r")]))]
   "TARGET_32BIT"
   "* return arm_output_shift(operands, 0);"
   [(set_attr "predicable" "yes")
-   (set_attr "arch" "t2,*,*")
-   (set_attr "predicable_short_it" "yes,no,no")
+   (set_attr "arch" "t2,t2,*,*")
+   (set_attr "predicable_short_it" "yes,yes,no,no")
    (set_attr "length" "4")
    (set_attr "shift" "1")
-   (set_attr "type" "alu_shift_reg,alu_shift_imm,alu_shift_reg")]
+   (set_attr "type" "alu_shift_reg,alu_shift_imm,alu_shift_imm,alu_shift_reg")]
 )
 
 (define_insn "*shiftsi3_compare"
diff --git a/gcc/config/arm/constraints.md b/gcc/config/arm/constraints.md
index e2a3099..05cf6dd 100644
--- a/gcc/config/arm/constraints.md
+++ b/gcc/config/arm/constraints.md
@@ -140,9 +140,9 @@
 		   : ival >= 0 && ival <= 1020 && (ival & 3) == 0")))
 
 (define_constraint "N"
- "Thumb-1 state a constant in the range 0-31."
+ "A constant in the range 0-31."
  (and (match_code "const_int")
-      (match_test "!TARGET_32BIT && (ival >= 0 && ival <= 31)")))
+      (match_test "ival >= 0 && ival <= 31")))
 
 (define_constraint "O"
  "In Thumb-1 state a constant that is a multiple of 4 in the range
diff --git a/gcc/testsuite/gcc.target/arm/thumb-ifcvt-2.c b/gcc/testsuite/gcc.target/arm/thumb-ifcvt-2.c
new file mode 100644
index 0000000..3da9ef0
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/thumb-ifcvt-2.c
@@ -0,0 +1,18 @@
+/* Check that Thumb 16-bit shifts by immediate can be if-converted.  */
+/* { dg-do compile } */
+/* { dg-require-effective-target arm_thumb2_ok } */
+/* { dg-options "-O2 -mthumb" } */
+
+int
+foo (int a, int b)
+{
+  if (a != b)
+      a = a << 1;
+  else
+      a = a >> 1;
+
+  return a + b;
+}
+
+/* { dg-final { scan-assembler "lslne" } } */
+/* { dg-final { scan-assembler "asreq" } } */
