On 08/29/2013 04:59 AM, Kirill Yukhin wrote: > @@ -7616,10 +7677,10 @@ > [(set_attr "type" "alu") > (set_attr "mode" "SI")]) > > -(define_insn "*andhi_1" > - [(set (match_operand:HI 0 "nonimmediate_operand" "=rm,r,Ya") > - (and:HI (match_operand:HI 1 "nonimmediate_operand" "%0,0,qm") > - (match_operand:HI 2 "general_operand" "rn,rm,L"))) > +(define_insn "andhi_1" > + [(set (match_operand:HI 0 "nonimmediate_operand" "=rm,r,Ya,!Yk") > + (and:HI (match_operand:HI 1 "nonimmediate_operand" "%0,0,qm,Yk") > + (match_operand:HI 2 "general_operand" "rn,rm,L,Yk"))) > (clobber (reg:CC FLAGS_REG))]
gen_andhi_1 is not used, nor is it likely to be in the future, therefore this should still have "*". > +(define_insn "<code>hi_1" > + [(set (match_operand:HI 0 "nonimmediate_operand" "=r,rm,!Yk") > + (any_or:HI > + (match_operand:HI 1 "nonimmediate_operand" "%0,0,Yk") > + (match_operand:HI 2 "general_operand" "<g>,r<i>,Yk"))) > + (clobber (reg:CC FLAGS_REG))] Likewise. With this and the register setup change mentioned down-thread, the patch is ok. r~
