On 06/09/13 14:48, James Greenhalgh wrote: > > Hi, > > This patch adds an "mrs" type to be used to categorize instructions > which read or write from a special/system/co-processor register. > > Then we add this type to all the pipeline descriptions. This probably > ends up as a miscategorization in most cases as we put "mrs" in the > same category as "multiple" in the pipelines. This will give the most > consistant behaviour with what came before. > > Regression tested on aarch64-none-elf and arm-none-eabi with no > regressions. > > OK? > > Thanks, > James > > --- > gcc/ > > 2013-09-06 James Greenhalgh <james.greenha...@arm.com> > > * config/arm/types.md (type): Add "mrs" type. > * config/aarch64/aarch64.md > (aarch64_load_tp_hard): Make type "mrs". > * config/arm/arm.md > (load_tp_hard): Make type "mrs". > * config/arm/cortex-a15.md: Update with new attributes. > * config/arm/cortex-a5.md: Update with new attributes. > * config/arm/cortex-a53.md: Update with new attributes. > * config/arm/cortex-a7.md: Update with new attributes. > * config/arm/cortex-a8.md: Update with new attributes. > * config/arm/cortex-a9.md: Update with new attributes. > * config/arm/cortex-m4.md: Update with new attributes. > * config/arm/cortex-r4.md: Update with new attributes. > * config/arm/fa526.md: Update with new attributes. > * config/arm/fa606te.md: Update with new attributes. > * config/arm/fa626te.md: Update with new attributes. > * config/arm/fa726te.md: Update with new attributes. >
OK. R.
