I had a thinko in processing the switches for quad memory, in that it cleared quad memory on 32-bit, and then OR'ed in the switches from the -mcpu, when it should have cleared it after the OR.
I have committed this patch as obvious (after checking it out to make sure it fixes the problem and builds): 2013-06-13 Michael Meissner <meiss...@linux.vnet.ibm.com> * config/rs6000/rs6000.c (rs6000_option_override_internal): Move test for clearing quad memory on 32-bit later. -- Michael Meissner, IBM IBM, M/S 2506R, 550 King Street, Littleton, MA 01460, USA email: meiss...@linux.vnet.ibm.com, phone: +1 (978) 899-4797
Index: gcc/config/rs6000/rs6000.c =================================================================== --- gcc/config/rs6000/rs6000.c (revision 200044) +++ gcc/config/rs6000/rs6000.c (working copy) @@ -2979,16 +2979,6 @@ rs6000_option_override_internal (bool gl } } - /* The quad memory instructions only works in 64-bit mode. In 32-bit mode, - silently turn off quad memory mode. */ - if (TARGET_QUAD_MEMORY && !TARGET_POWERPC64) - { - if ((rs6000_isa_flags_explicit & OPTION_MASK_QUAD_MEMORY) != 0) - warning (0, N_("-mquad-memory requires 64-bit mode")); - - rs6000_isa_flags &= ~OPTION_MASK_QUAD_MEMORY; - } - if (TARGET_DEBUG_REG || TARGET_DEBUG_TARGET) rs6000_print_isa_options (stderr, 0, "before defaults", rs6000_isa_flags); @@ -3046,6 +3036,16 @@ rs6000_option_override_internal (bool gl rs6000_isa_flags &= ~OPTION_MASK_VSX_TIMODE; } + /* The quad memory instructions only works in 64-bit mode. In 32-bit mode, + silently turn off quad memory mode. */ + if (TARGET_QUAD_MEMORY && !TARGET_POWERPC64) + { + if ((rs6000_isa_flags_explicit & OPTION_MASK_QUAD_MEMORY) != 0) + warning (0, N_("-mquad-memory requires 64-bit mode")); + + rs6000_isa_flags &= ~OPTION_MASK_QUAD_MEMORY; + } + if (TARGET_DEBUG_REG || TARGET_DEBUG_TARGET) rs6000_print_isa_options (stderr, 0, "after defaults", rs6000_isa_flags);