OK /M
On 14 May 2013 14:43, James Greenhalgh <james.greenha...@arm.com> wrote: > > Hi, > > For a statement like: > > INT = FLOAT > FLOAT ? INT : INT. > > The vcond implementation in AArch64 is broken. We will try to force > the INT value to a FLOAT register and will ICE. > > This patch fixes this. > > Regression suite run for aarch64-none-elf with no regressions, > and more cases added to the testsuite to ensure this is caught > in future. > > Thanks, > James Greenhalgh > > --- > gcc/ > > * config/aarch64/aarch64-simd.md > (aarch64_vcond_internal<mode>): Rename to... > (aarch64_vcond_internal<mode><mode>): ...This, for integer modes. > (aarch64_vcond_internal<VDQF_COND:mode><VDQF:mode>): ...This for > float modes. Clarify all iterator modes. > (vcond<mode><mode>): Use new name for vcond expanders. > (vcond<v_cmp_result><mode>): Likewise. > (vcondu<mode><mode>: Likewise. > * config/aarch64/iterators.md (VDQF_COND): New. > > gcc/testsuite/ > > * gcc.target/aarch64/vect-fcm.x: Add cases testing > FLOAT cmp FLOAT ? INT : INT. > * gcc.target/aarch64/vect-fcm-eq-d.c: Define IMODE. > * gcc.target/aarch64/vect-fcm-eq-f.c: Likewise. > * gcc.target/aarch64/vect-fcm-ge-d.c: Likewise. > * gcc.target/aarch64/vect-fcm-ge-f.c: Likewise. > * gcc.target/aarch64/vect-fcm-gt-d.c: Likewise. > * gcc.target/aarch64/vect-fcm-gt-f.c: Likewise.
