Hi all,
This patch adds a splitter variant of the minmax_arithsi pattern for when
the operator
is non-commutative (MINUS) and the ordering of the operands is not
canonical.
That is, it will trigger for:
#define MAX(a, b) (a > b ? a : b)
int
foo (int a, int b, int c)
{
return c - MAX (a,b);
}
and will generate:
cmp r1, r0
rsbge r0, r1, r2
rsblt r0, r0, r2
instead of the current:
cmp r0, r1
movlt r0, r1
rsb r0, r0, r2
No regressions on arm-none-eabi.
Ok for trunk?
Thanks,
Kyrill
gcc/
2013-03-21 Kyrylo Tkachov <kyrylo.tkac...@arm.com>
* config/arm/arm.md (minmax_arithsi_non_canon): New pattern.
gcc/testsuite
2013-03-21 Kyrylo Tkachov <kyrylo.tkac...@arm.com>
* gcc.target/arm/minmax_minus.c: New test.diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md
index f3c59f3..c2875f9 100644
--- a/gcc/config/arm/arm.md
+++ b/gcc/config/arm/arm.md
@@ -3423,6 +3423,49 @@
(const_int 12)))]
)
+; Reject the frame pointer in operand[1], since reloading this after
+; it has been eliminated can cause carnage.
+(define_insn_and_split "*minmax_arithsi_non_canon"
+ [(set (match_operand:SI 0 "s_register_operand" "=r,r")
+ (minus:SI
+ (match_operand:SI 1 "s_register_operand" "0,?r")
+ (match_operator:SI 4 "minmax_operator"
+ [(match_operand:SI 2 "s_register_operand" "r,r")
+ (match_operand:SI 3 "arm_rhs_operand" "rI,rI")])))
+ (clobber (reg:CC CC_REGNUM))]
+ "TARGET_32BIT && !arm_eliminable_register (operands[1])"
+ "#"
+ "TARGET_32BIT && !arm_eliminable_register (operands[1])"
+ [(set (reg:CC CC_REGNUM)
+ (compare:CC (match_dup 2) (match_dup 3)))
+ (cond_exec (match_op_dup 4 [(reg:CC CC_REGNUM) (const_int 0)])
+ (set (match_dup 0)
+ (minus:SI (match_dup 1)
+ (match_dup 2))))
+ (cond_exec (match_op_dup 5 [(reg:CC CC_REGNUM) (const_int 0)])
+ (set (match_dup 0)
+ (minus:SI (match_dup 1)
+ (match_dup 3))))]
+ {
+ enum machine_mode mode = SELECT_CC_MODE (GET_CODE (operands[1]),
+ operands[2], operands[3]);
+ enum rtx_code rc = minmax_code (operands[4]);
+ operands[4] = gen_rtx_fmt_ee (rc, SImode,
+ operands[2], operands[3]);
+
+ if (mode == CCFPmode || mode == CCFPEmode)
+ rc = reverse_condition_maybe_unordered (rc);
+ else
+ rc = reverse_condition (rc);
+ operands[5] = gen_rtx_fmt_ee (rc, SImode, operands[2], operands[3]);
+ }
+ [(set_attr "conds" "clob")
+ (set (attr "length")
+ (if_then_else (eq_attr "is_thumb" "yes")
+ (const_int 14)
+ (const_int 12)))]
+)
+
(define_code_iterator SAT [smin smax])
(define_code_iterator SATrev [smin smax])
(define_code_attr SATlo [(smin "1") (smax "2")])
diff --git a/gcc/testsuite/gcc.target/arm/minmax_minus.c
b/gcc/testsuite/gcc.target/arm/minmax_minus.c
new file mode 100644
index 0000000..050c847
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/minmax_minus.c
@@ -0,0 +1,12 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+#define MAX(a, b) (a > b ? a : b)
+int
+foo (int a, int b, int c)
+{
+ return c - MAX (a, b);
+}
+
+/* { dg-final { scan-assembler "rsbge" } } */
+/* { dg-final { scan-assembler "rsblt" } } */
